diff --git a/01_Matlab/01_Libraries/01_Controller/BLDC_controller_Lib.slx b/01_Matlab/01_Libraries/01_Controller/BLDC_controller_Lib.slx index 4e27622..7d74270 100644 Binary files a/01_Matlab/01_Libraries/01_Controller/BLDC_controller_Lib.slx and b/01_Matlab/01_Libraries/01_Controller/BLDC_controller_Lib.slx differ diff --git a/01_Matlab/03_CreateParamTable/tableParamType.xlsx b/01_Matlab/03_CreateParamTable/tableParamType.xlsx index c5f1b2c..20aa626 100644 Binary files a/01_Matlab/03_CreateParamTable/tableParamType.xlsx and b/01_Matlab/03_CreateParamTable/tableParamType.xlsx differ diff --git a/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx b/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx index fae0bc2..a7b9dee 100644 Binary files a/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx and b/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx differ diff --git a/01_Matlab/init_model.m b/01_Matlab/init_model.m index 647d4b6..18832d6 100644 --- a/01_Matlab/init_model.m +++ b/01_Matlab/init_model.m @@ -56,7 +56,7 @@ r_cos_M1 = cos((a_elecAngle_XA + 30)*(pi/180)); % stairs(a_elecAngle_XA, r_cos_M1); % legend('sin','cos'); -%% Control Manager +%% Control selection % Control type selection CTRL_COM = 0; % [-] Commutation Control CTRL_SIN = 1; % [-] Sinusoidal Control @@ -70,6 +70,7 @@ SPD_MODE = 2; % [-] Speed mode TRQ_MODE = 3; % [-] Torque mode z_ctrlModReq = VLT_MODE; % [-] Control Mode Request (default) + %% F01_Estimations % Position Estimation Parameters % Hall = 4*hA + 2*hB + hC @@ -87,41 +88,36 @@ n_stdStillDet = 3; % [rpm] Speed threshold for Stand still detectio cf_currFilt = 0.12; % [%] Current filter coefficient [0, 1]. Lower values mean softer filter %% F02_Diagnostics -b_diagEna = 1; % [-] Diagnostics enable flag: 0 = Disabled, 1 = Enabled (default) -t_errQual = 0.6 * f_ctrl; % [s] Error qualification time -t_errDequal = 2.0 * f_ctrl; % [s] Error dequalification time -r_errInpTgtThres = 400; % [-] Error input target threshold (for "Blocked motor" detection) +b_diagEna = 1; % [-] Diagnostics enable flag: 0 = Disabled, 1 = Enabled (default) +t_errQual = 0.6 * f_ctrl/3; % [s] Error qualification time +t_errDequal = 2.0 * f_ctrl/3; % [s] Error dequalification time +r_errInpTgtThres = 400; % [-] Error input target threshold (for "Blocked motor" detection) -%% F04_Field_Oriented_Control +%% F03_Control_Mode_Manager +dV_openRate = 1000 / (f_ctrl/3);% [V/s] Rate for voltage cut-off in Open Mode (Sample Time included in the rate) -% Current measurement -b_selPhaABCurrMeas = 1; % [-] Measured phase currents selection: {iA,iB} = 1 (default); {iB,iC} = 0 -dV_openRate = 1000 / f_ctrl; % [V/s] Rate for voltage cut-off in Open Mode (Sample Time included in the rate) - -% Field Weakening +%% F04_Field_Weakening b_fieldWeakEna = 0; % [-] Field weakening enable flag: 0 = disable (default), 1 = enable -n_fieldWeakAuthHi = 200; % [rpm] Motor speed High for field weakening authorization -n_fieldWeakAuthLo = 140; % [rpm] Motor speed Low for field weakening authorization -id_fieldWeak_M1 = [0 0.1 0.3 0.7 1.3 2.1 3 3.8 4.4 4.8 5 5] * i_sca; % [-] Field weakening current map -r_fieldWeak_XA = [570 600 630 660 690 720 750 780 810 840 870 900]; % [-] Scaled input target grid -% figure -% plot(r_fieldWeak_XA, id_fieldWeak_M1, '.-'); hold on -% grid +r_fieldWeakHi = 1500; % [-] Input target High threshold for reaching maximum Field Weakening / Phase Advance +r_fieldWeakLo = 1000; % [-] Input target Low threshold for starting Field Weakening / Phase Advance +n_fieldWeakAuthHi = 400; % [rpm] Motor speed High for field weakening authorization +n_fieldWeakAuthLo = 300; % [rpm] Motor speed Low for field weakening authorization -% Q axis control gains -cf_iqKp = 0.5; % [-] P gain -cf_iqKi = 100 / f_ctrl; % [-] I gain +% FOC method +id_fieldWeakMax = 5 * i_sca; % [A] Field weakening maximum current -% D axis control gains -cf_idKp = 0.2; % [-] P gain -cf_idKi = 60 / f_ctrl; % [-] I gain +% SIN method +a_phaAdvMax = 25; % [deg] Maximum phase advance angle -% Speed control gains -cf_nKp = 1.18; % [-] P gain -cf_nKi = 20.4 / f_ctrl; % [-] I gain -% Limitations -%------------------------------- +%% F05_Field_Oriented_Control +b_selPhaABCurrMeas = 1; % [-] Select measured current phases: {iA,iB} = 1 (default); {iB,iC} = 0 + +% Motor Limitations Calibratables +cf_iqKiLimProt = 60 / (f_ctrl/3); % [-] Current limit protection integral gain (only used in VLT_MODE and SPD_MODE) +cf_nKiLimProt = 20 / (f_ctrl/3); % [-] Speed limit protection integral gain (only used in VLT_MODE and TRQ_MODE) +cf_KbLimProt = 1000 / (f_ctrl/3);% [-] Back calculation gain for integral anti-windup + % Voltage Limitations V_margin = 100; % [-] Voltage margin to make sure that there is a sufficiently wide pulse for a good phase current measurement Vd_max = 1000 - V_margin; @@ -131,12 +127,9 @@ Vq_max_M1 = sqrt(Vd_max^2 - Vq_max_XA.^2); % Circle limitations look- % stairs(Vq_max_XA, Vq_max_M1); legend('V_{max}'); % Speed limitations -cf_nKpLimProt = 5; % [-] Speed limit protection gain (only used in VLT_MODE and TRQ_MODE) -n_max = 800; % [rpm] Maximum motor speed +n_max = 1000; % [rpm] Maximum motor speed % Current Limitations -cf_iqKpLimProt = 7.2; % [-] Current limit protection gain (only used in VLT_MODE and SPD_MODE) -cf_iqKiLimProt = 40.7 / f_ctrl; % [-] Current limit protection integral gain (only used in SPD_MODE) i_max = 15; % [A] Maximum allowed motor current (continuous) i_max = i_max * i_sca; iq_maxSca_XA = 0:0.02:0.99; @@ -146,18 +139,25 @@ iq_maxSca_M1 = sqrt(1 - iq_maxSca_XA.^2); % stairs(iq_maxSca_XA, iq_maxSca_M1); legend('i_{maxSca}'); %------------------------------- -%% F05_Control_Type_Management +% Q axis control gains +cf_iqKp = 0.3; % [-] P gain +cf_iqKi = 100 / (f_ctrl/3); % [-] I gain + +% D axis control gains +cf_idKp = 0.2; % [-] P gain +cf_idKi = 60 / (f_ctrl/3); % [-] I gain + +% Speed control gains +cf_nKp = 1.18; % [-] P gain +cf_nKi = 20.4 / (f_ctrl/3);% [-] I gain +%------------------------------- + +%% F06_Control_Type_Management % Commutation method z_commutMap_M1 = [-1 -1 0 1 1 0; % Phase A 1 0 -1 -1 0 1; % Phase B - 0 1 1 0 -1 -1]; % Phase C [-] Commutation method map - -% Sinusoidal method -% The map below was experimentaly calibrated on the real motor. Objectives: minimum noise and minimum torque ripple -a_phaAdv_M1 = [0 0 0 0 0 2 3 5 9 16 25]; % [deg] Phase advance angle -r_phaAdv_XA = [0 100 200 300 400 500 600 700 800 900 1000]; % [-] Scaled input target grid -% plot(r_phaAdv_XA, a_phaAdv_M1); + 0 1 1 0 -1 -1]; % Phase C [-] Commutation method map omega = a_elecAngle_XA*(pi/180); pha_adv = 30; % [deg] Phase advance to mach commands with the Hall position @@ -165,7 +165,7 @@ r_sinPhaA_M1 = -sin(omega + pha_adv*(pi/180)); r_sinPhaB_M1 = -sin(omega - 120*(pi/180) + pha_adv*(pi/180)); r_sinPhaC_M1 = -sin(omega + 120*(pi/180) + pha_adv*(pi/180)); -% Sinusoidal 3rd armonic method +% Sinusoidal 3rd harmonic method A = 1.15; % Sine amplitude (tunable to get the Saddle sin maximum to value 1000) sin3Arm = -0.224*sin(3*(omega + pha_adv*(pi/180))); % 3rd armonic r_sin3PhaA_M1 = sin3Arm + A*r_sinPhaA_M1; diff --git a/Inc/BLDC_controller.h b/Inc/BLDC_controller.h index 2c08169..acfba7a 100644 --- a/Inc/BLDC_controller.h +++ b/Inc/BLDC_controller.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1212 + * Model version : 1.1249 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Sat Nov 30 08:54:28 2019 + * C/C++ source code generated on : Thu Dec 12 20:22:31 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex @@ -30,138 +30,150 @@ /* Forward declaration for rtModel */ typedef struct tag_RTM RT_MODEL; -/* Block signals and states (auto storage) for system '/Counter' */ +/* Block signals and states (auto storage) for system '/Counter' */ typedef struct { - int16_T UnitDelay_DSTATE; /* '/UnitDelay' */ + int16_T UnitDelay_DSTATE; /* '/UnitDelay' */ } DW_Counter; -/* Block signals and states (auto storage) for system '/PI_clamp_fixdt_id' */ +/* Block signals and states (auto storage) for system '/PI_clamp_fixdt' */ typedef struct { - int32_T UnitDelay_DSTATE; /* '/UnitDelay' */ - boolean_T UnitDelay1_DSTATE; /* '/UnitDelay1' */ + int32_T UnitDelay_DSTATE; /* '/UnitDelay' */ + boolean_T UnitDelay1_DSTATE; /* '/UnitDelay1' */ } DW_PI_clamp_fixdt; -/* Block signals and states (auto storage) for system '/Low_Pass_Filter' */ +/* Block signals and states (auto storage) for system '/Low_Pass_Filter' */ typedef struct { int16_T UnitDelay3_DSTATE[2]; /* '/UnitDelay3' */ } DW_Low_Pass_Filter; -/* Block signals and states (auto storage) for system '/PI_clamp_fixdt_n' */ +/* Block signals and states (auto storage) for system '/I_backCalc_fixdt' */ typedef struct { - int32_T UnitDelay_DSTATE; /* '/UnitDelay' */ - boolean_T UnitDelay1_DSTATE; /* '/UnitDelay1' */ -} DW_PI_clamp_fixdt_c; + int32_T UnitDelay_DSTATE; /* '/UnitDelay' */ + int32_T UnitDelay_DSTATE_h; /* '/UnitDelay' */ +} DW_I_backCalc_fixdt; -/* Block signals and states (auto storage) for system '/Counter' */ +/* Block signals and states (auto storage) for system '/Counter' */ typedef struct { - uint16_T UnitDelay_DSTATE; /* '/UnitDelay' */ + uint16_T UnitDelay_DSTATE; /* '/UnitDelay' */ } DW_Counter_l; -/* Block signals and states (auto storage) for system '/either_edge' */ +/* Block signals and states (auto storage) for system '/either_edge' */ typedef struct { - boolean_T UnitDelay_DSTATE; /* '/UnitDelay' */ + boolean_T UnitDelay_DSTATE; /* '/UnitDelay' */ } DW_either_edge; /* Block signals and states (auto storage) for system '/Debounce_Filter' */ typedef struct { - DW_either_edge either_edge_k; /* '/either_edge' */ - DW_Counter_l Counter_h; /* '/Counter' */ - DW_Counter_l Counter_i0; /* '/Counter' */ - boolean_T UnitDelay_DSTATE; /* '/UnitDelay' */ + DW_either_edge either_edge_k; /* '/either_edge' */ + DW_Counter_l Counter_h; /* '/Counter' */ + DW_Counter_l Counter_i0; /* '/Counter' */ + boolean_T UnitDelay_DSTATE; /* '/UnitDelay' */ } DW_Debounce_Filter; /* Block signals and states (auto storage) for system '' */ typedef struct { DW_either_edge either_edge_a; /* '/either_edge' */ DW_Debounce_Filter Debounce_Filter_f;/* '/Debounce_Filter' */ - DW_PI_clamp_fixdt PI_clamp_fixdt_iq; /* '/PI_clamp_fixdt_iq' */ - DW_PI_clamp_fixdt_c PI_clamp_fixdt_n_o;/* '/PI_clamp_fixdt_n' */ - DW_Low_Pass_Filter Low_Pass_Filter_m;/* '/Low_Pass_Filter' */ - DW_PI_clamp_fixdt PI_clamp_fixdt_id; /* '/PI_clamp_fixdt_id' */ - DW_Counter Counter_e; /* '/Counter' */ - int32_T UnitDelay_DSTATE; /* '/UnitDelay' */ - int16_T Gain4[3]; /* '/Gain4' */ + DW_I_backCalc_fixdt I_backCalc_fixdt_g;/* '/I_backCalc_fixdt' */ + DW_I_backCalc_fixdt I_backCalc_fixdt1;/* '/I_backCalc_fixdt1' */ + DW_I_backCalc_fixdt I_backCalc_fixdt_i;/* '/I_backCalc_fixdt' */ + DW_Low_Pass_Filter Low_Pass_Filter_m;/* '/Low_Pass_Filter' */ + DW_PI_clamp_fixdt PI_clamp_fixdt_a; /* '/PI_clamp_fixdt' */ + DW_PI_clamp_fixdt PI_clamp_fixdt_o; /* '/PI_clamp_fixdt' */ + DW_PI_clamp_fixdt PI_clamp_fixdt_k; /* '/PI_clamp_fixdt' */ + DW_Counter Counter_e; /* '/Counter' */ + int32_T Divide1; /* '/Divide1' */ + int32_T UnitDelay_DSTATE; /* '/UnitDelay' */ + int16_T Gain4[3]; /* '/Gain4' */ int16_T Sum1[2]; /* '/Sum1' */ - int16_T z_counterRawPrev; /* '/z_counterRawPrev' */ - int16_T Merge; /* '/Merge' */ - int16_T Divide1; /* '/Divide1' */ - int16_T Divide4; /* '/Divide4' */ - int16_T Switch1; /* '/Switch1' */ - int16_T Divide11; /* '/Divide11' */ - int16_T UnitDelay3_DSTATE; /* '/UnitDelay3' */ - int16_T UnitDelay4_DSTATE; /* '/UnitDelay4' */ - int16_T UnitDelay2_DSTATE; /* '/UnitDelay2' */ - int16_T UnitDelay3_DSTATE_o; /* '/UnitDelay3' */ - int16_T UnitDelay5_DSTATE; /* '/UnitDelay5' */ - int16_T UnitDelay4_DSTATE_e; /* '/UnitDelay4' */ - int16_T UnitDelay4_DSTATE_eu; /* '/UnitDelay4' */ - int8_T Switch2; /* '/Switch2' */ - int8_T UnitDelay2_DSTATE_b; /* '/UnitDelay2' */ - int8_T If2_ActiveSubsystem; /* '/If2' */ - int8_T If2_ActiveSubsystem_j; /* '/If2' */ + int16_T z_counterRawPrev; /* '/z_counterRawPrev' */ + int16_T Merge1; /* '/Merge1' */ + int16_T Divide3; /* '/Divide3' */ + int16_T Vd_max1; /* '/Vd_max1' */ + int16_T Gain3; /* '/Gain3' */ + int16_T Vq_max_M1; /* '/Vq_max_M1' */ + int16_T Gain5; /* '/Gain5' */ + int16_T i_max; /* '/i_max' */ + int16_T Divide1_a; /* '/Divide1' */ + int16_T Gain1; /* '/Gain1' */ + int16_T Gain4_c; /* '/Gain4' */ + int16_T Switch2; /* '/Switch2' */ + int16_T Switch2_l; /* '/Switch2' */ + int16_T Switch2_c; /* '/Switch2' */ + int16_T Merge; /* '/Merge' */ + int16_T Switch1; /* '/Switch1' */ + int16_T Divide11; /* '/Divide11' */ + int16_T UnitDelay3_DSTATE; /* '/UnitDelay3' */ + int16_T UnitDelay4_DSTATE; /* '/UnitDelay4' */ + int16_T UnitDelay2_DSTATE; /* '/UnitDelay2' */ + int16_T UnitDelay3_DSTATE_o; /* '/UnitDelay3' */ + int16_T UnitDelay5_DSTATE; /* '/UnitDelay5' */ + int16_T UnitDelay4_DSTATE_e; /* '/UnitDelay4' */ + int16_T UnitDelay4_DSTATE_eu; /* '/UnitDelay4' */ + int16_T UnitDelay4_DSTATE_h; /* '/UnitDelay4' */ + int8_T Switch2_e; /* '/Switch2' */ + int8_T UnitDelay2_DSTATE_b; /* '/UnitDelay2' */ + int8_T If4_ActiveSubsystem; /* '/If4' */ int8_T If1_ActiveSubsystem; /* '/If1' */ - int8_T If2_ActiveSubsystem_a; /* '/If2' */ - int8_T If1_ActiveSubsystem_e; /* '/If1' */ - int8_T If1_ActiveSubsystem_f; /* '/If1' */ - int8_T If2_ActiveSubsystem_c; /* '/If2' */ - int8_T SwitchCase_ActiveSubsystem; /* '/Switch Case' */ - uint8_T UnitDelay3_DSTATE_fy; /* '/UnitDelay3' */ - uint8_T UnitDelay1_DSTATE; /* '/UnitDelay1' */ - uint8_T UnitDelay2_DSTATE_f; /* '/UnitDelay2' */ - uint8_T UnitDelay1_DSTATE_p; /* '/UnitDelay1' */ - uint8_T UnitDelay_DSTATE_c; /* '/UnitDelay' */ + int8_T If2_ActiveSubsystem; /* '/If2' */ + int8_T If2_ActiveSubsystem_a; /* '/If2' */ + uint8_T z_ctrlMod; /* '/F03_02_Control_Mode_Manager' */ + uint8_T UnitDelay3_DSTATE_fy; /* '/UnitDelay3' */ + uint8_T UnitDelay1_DSTATE; /* '/UnitDelay1' */ + uint8_T UnitDelay2_DSTATE_f; /* '/UnitDelay2' */ uint8_T is_active_c1_BLDC_controller;/* '/F03_02_Control_Mode_Manager' */ uint8_T is_c1_BLDC_controller; /* '/F03_02_Control_Mode_Manager' */ uint8_T is_ACTIVE; /* '/F03_02_Control_Mode_Manager' */ - boolean_T Merge_n; /* '/Merge' */ - boolean_T dz_cntTrnsDet; /* '/dz_cntTrnsDet' */ - boolean_T UnitDelay_DSTATE_e; /* '/UnitDelay' */ - boolean_T UnitDelay1_DSTATE_n; /* '/UnitDelay1' */ - boolean_T n_commDeacv_Mode; /* '/n_commDeacv' */ - boolean_T n_fieldWeakAuth_Mode; /* '/n_fieldWeakAuth' */ - boolean_T n_fieldWeakAuth_Mode_m; /* '/n_fieldWeakAuth' */ - boolean_T dz_cntTrnsDet_Mode; /* '/dz_cntTrnsDet' */ + boolean_T Merge_n; /* '/Merge' */ + boolean_T dz_cntTrnsDet; /* '/dz_cntTrnsDet' */ + boolean_T UnitDelay2_DSTATE_g; /* '/UnitDelay2' */ + boolean_T UnitDelay5_DSTATE_l; /* '/UnitDelay5' */ + boolean_T UnitDelay6_DSTATE; /* '/UnitDelay6' */ + boolean_T UnitDelay_DSTATE_e; /* '/UnitDelay' */ + boolean_T UnitDelay1_DSTATE_n; /* '/UnitDelay1' */ + boolean_T n_commDeacv_Mode; /* '/n_commDeacv' */ + boolean_T dz_cntTrnsDet_Mode; /* '/dz_cntTrnsDet' */ } DW; /* Constant parameters (auto storage) */ typedef struct { /* Computed Parameter: r_sin3PhaA_M1_Table - * Referenced by: '/r_sin3PhaA_M1' + * Referenced by: '/r_sin3PhaA_M1' */ int16_T r_sin3PhaA_M1_Table[181]; /* Computed Parameter: r_sin3PhaB_M1_Table - * Referenced by: '/r_sin3PhaB_M1' + * Referenced by: '/r_sin3PhaB_M1' */ int16_T r_sin3PhaB_M1_Table[181]; /* Computed Parameter: r_sin3PhaC_M1_Table - * Referenced by: '/r_sin3PhaC_M1' + * Referenced by: '/r_sin3PhaC_M1' */ int16_T r_sin3PhaC_M1_Table[181]; /* Computed Parameter: r_sin_M1_Table - * Referenced by: '/r_sin_M1' + * Referenced by: '/r_sin_M1' */ int16_T r_sin_M1_Table[181]; /* Computed Parameter: r_cos_M1_Table - * Referenced by: '/r_cos_M1' + * Referenced by: '/r_cos_M1' */ int16_T r_cos_M1_Table[181]; /* Computed Parameter: iq_maxSca_M1_Table - * Referenced by: '/iq_maxSca_M1' + * Referenced by: '/iq_maxSca_M1' */ uint16_T iq_maxSca_M1_Table[50]; /* Computed Parameter: z_commutMap_M1_table - * Referenced by: '/z_commutMap_M1' + * Referenced by: '/z_commutMap_M1' */ int8_T z_commutMap_M1_table[18]; /* Computed Parameter: vec_hallToPos_Value - * Referenced by: '/vec_hallToPos' + * Referenced by: '/vec_hallToPos' */ int8_T vec_hallToPos_Value[8]; } ConstP; @@ -194,24 +206,24 @@ typedef struct { /* Parameters (auto storage) */ struct P_ { int32_T dV_openRate; /* Variable: dV_openRate - * Referenced by: '/dV_openRate' + * Referenced by: '/dV_openRate' */ int16_T dz_cntTrnsDetHi; /* Variable: dz_cntTrnsDetHi - * Referenced by: '/dz_cntTrnsDet' + * Referenced by: '/dz_cntTrnsDet' */ int16_T dz_cntTrnsDetLo; /* Variable: dz_cntTrnsDetLo - * Referenced by: '/dz_cntTrnsDet' + * Referenced by: '/dz_cntTrnsDet' */ int16_T z_maxCntRst; /* Variable: z_maxCntRst * Referenced by: - * '/Counter' - * '/z_maxCntRst' - * '/z_maxCntRst2' - * '/UnitDelay3' - * '/z_counter' + * '/Counter' + * '/z_maxCntRst' + * '/z_maxCntRst2' + * '/UnitDelay3' + * '/z_counter' */ uint16_T cf_speedCoef; /* Variable: cf_speedCoef - * Referenced by: '/cf_speedCoef' + * Referenced by: '/cf_speedCoef' */ uint16_T t_errDequal; /* Variable: t_errDequal * Referenced by: '/t_errDequal' @@ -221,88 +233,90 @@ struct P_ { */ int16_T Vd_max; /* Variable: Vd_max * Referenced by: - * '/Vd_max1' - * '/Vd_max' + * '/Vd_max1' + * '/Vd_max' */ int16_T Vq_max_M1[46]; /* Variable: Vq_max_M1 - * Referenced by: '/Vq_max_M1' + * Referenced by: '/Vq_max_M1' */ int16_T Vq_max_XA[46]; /* Variable: Vq_max_XA - * Referenced by: '/Vq_max_XA' + * Referenced by: '/Vq_max_XA' + */ + int16_T a_phaAdvMax; /* Variable: a_phaAdvMax + * Referenced by: '/a_phaAdvMax' */ int16_T i_max; /* Variable: i_max * Referenced by: - * '/i_max' - * '/i_max' + * '/i_max' + * '/i_max' */ - int16_T id_fieldWeak_M1[12]; /* Variable: id_fieldWeak_M1 - * Referenced by: '/id_fieldWeak_M1' + int16_T id_fieldWeakMax; /* Variable: id_fieldWeakMax + * Referenced by: '/id_fieldWeakMax' */ int16_T n_commAcvLo; /* Variable: n_commAcvLo - * Referenced by: '/n_commDeacv' + * Referenced by: '/n_commDeacv' */ int16_T n_commDeacvHi; /* Variable: n_commDeacvHi - * Referenced by: '/n_commDeacv' + * Referenced by: '/n_commDeacv' */ int16_T n_fieldWeakAuthHi; /* Variable: n_fieldWeakAuthHi - * Referenced by: - * '/n_fieldWeakAuth' - * '/n_fieldWeakAuth' + * Referenced by: '/n_fieldWeakAuthHi' */ int16_T n_fieldWeakAuthLo; /* Variable: n_fieldWeakAuthLo - * Referenced by: - * '/n_fieldWeakAuth' - * '/n_fieldWeakAuth' + * Referenced by: '/n_fieldWeakAuthLo' */ int16_T n_max; /* Variable: n_max * Referenced by: - * '/n_max1' - * '/n_max' + * '/n_max1' + * '/n_max' */ int16_T n_stdStillDet; /* Variable: n_stdStillDet - * Referenced by: '/n_stdStillDet' + * Referenced by: '/n_stdStillDet' */ int16_T r_errInpTgtThres; /* Variable: r_errInpTgtThres * Referenced by: '/r_errInpTgtThres' */ - int16_T r_fieldWeak_XA[12]; /* Variable: r_fieldWeak_XA - * Referenced by: '/r_fieldWeak_XA' + int16_T r_fieldWeakHi; /* Variable: r_fieldWeakHi + * Referenced by: '/r_fieldWeakHi' */ - int16_T r_phaAdv_XA[11]; /* Variable: r_phaAdv_XA - * Referenced by: '/r_phaAdv_XA' + int16_T r_fieldWeakLo; /* Variable: r_fieldWeakLo + * Referenced by: '/r_fieldWeakLo' + */ + uint16_T cf_KbLimProt; /* Variable: cf_KbLimProt + * Referenced by: + * '/cf_KbLimProt' + * '/cf_KbLimProt' */ uint16_T cf_idKp; /* Variable: cf_idKp - * Referenced by: '/cf_idKp1' + * Referenced by: '/cf_idKp1' */ uint16_T cf_iqKp; /* Variable: cf_iqKp - * Referenced by: '/cf_iqKp' + * Referenced by: '/cf_iqKp' */ uint16_T cf_nKp; /* Variable: cf_nKp - * Referenced by: '/cf_nKp' + * Referenced by: '/cf_nKp' */ uint16_T cf_currFilt; /* Variable: cf_currFilt - * Referenced by: '/cf_currFilt' + * Referenced by: '/cf_currFilt' */ uint16_T cf_idKi; /* Variable: cf_idKi - * Referenced by: '/cf_idKi1' + * Referenced by: '/cf_idKi1' */ uint16_T cf_iqKi; /* Variable: cf_iqKi - * Referenced by: '/cf_iqKi' + * Referenced by: '/cf_iqKi' */ uint16_T cf_iqKiLimProt; /* Variable: cf_iqKiLimProt - * Referenced by: '/cf_iqKiLimProt' + * Referenced by: + * '/cf_iqKiLimProt' + * '/cf_iqKiLimProt' */ uint16_T cf_nKi; /* Variable: cf_nKi - * Referenced by: '/cf_nKi' + * Referenced by: '/cf_nKi' */ - uint16_T cf_iqKpLimProt; /* Variable: cf_iqKpLimProt - * Referenced by: '/cf_iqKpLimProt' - */ - uint16_T cf_nKpLimProt; /* Variable: cf_nKpLimProt - * Referenced by: '/cf_nKpLimProt' - */ - int16_T a_phaAdv_M1[11]; /* Variable: a_phaAdv_M1 - * Referenced by: '/a_phaAdv_M1' + uint16_T cf_nKiLimProt; /* Variable: cf_nKiLimProt + * Referenced by: + * '/cf_nKiLimProt' + * '/cf_nKiLimProt' */ uint8_T z_ctrlTypSel; /* Variable: z_ctrlTypSel * Referenced by: '/z_ctrlTypSel1' @@ -312,11 +326,11 @@ struct P_ { */ boolean_T b_fieldWeakEna; /* Variable: b_fieldWeakEna * Referenced by: - * '/b_fieldWeakEna' - * '/b_fieldWeakEna' + * '/b_fieldWeakEna' + * '/b_fieldWeakEna' */ boolean_T b_selPhaABCurrMeas; /* Variable: b_selPhaABCurrMeas - * Referenced by: '/b_selPhaABCurrMeas' + * Referenced by: '/b_selPhaABCurrMeas' */ }; @@ -341,24 +355,33 @@ extern void BLDC_controller_step(RT_MODEL *const rtM); /*- * These blocks were eliminated from the model due to optimizations: * - * Block '/Scope2' : Unused code path elimination - * Block '/Scope' : Unused code path elimination - * Block '/Data Type Duplicate' : Unused code path elimination - * Block '/Data Type Propagation' : Unused code path elimination - * Block '/Data Type Duplicate' : Unused code path elimination - * Block '/Data Type Propagation' : Unused code path elimination - * Block '/Data Type Duplicate' : Unused code path elimination - * Block '/Data Type Propagation' : Unused code path elimination - * Block '/Scope12' : Unused code path elimination - * Block '/Scope8' : Unused code path elimination - * Block '/Scope9' : Unused code path elimination - * Block '/Data Type Duplicate' : Unused code path elimination - * Block '/Data Type Propagation' : Unused code path elimination - * Block '/Data Type Duplicate' : Unused code path elimination - * Block '/Data Type Propagation' : Unused code path elimination - * Block '/Data Type Duplicate' : Unused code path elimination - * Block '/Data Type Propagation' : Unused code path elimination - * Block '/Scope' : Unused code path elimination + * Block '/Scope2' : Unused code path elimination + * Block '/Scope' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Data Type Duplicate' : Unused code path elimination + * Block '/Data Type Propagation' : Unused code path elimination + * Block '/Scope12' : Unused code path elimination + * Block '/Scope8' : Unused code path elimination + * Block '/Scope9' : Unused code path elimination + * Block '/Scope' : Unused code path elimination + * Block '/Data Type Conversion' : Eliminate redundant data type conversion */ /*- @@ -383,76 +406,90 @@ extern void BLDC_controller_step(RT_MODEL *const rtM); * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations' * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics' * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_01_Edge_Detector' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_02_Position_Calculation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_03_Direction_Detection' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_05_Electrical_Angle_Estimation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation/Counter' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation/Raw_Motor_Speed_Estimation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation/Counter/rst_Delay' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/either_edge' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Default' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/either_edge' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter/rst_Delay' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter/rst_Delay' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_01_Mode_Transition_Calculation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_02_Control_Mode_Manager' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Default_Control_Type' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Default_Mode' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/FOC_Control_Type' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/Rate_Limiter' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/rising_edge_init' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/Rate_Limiter/Delay_Init1' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/Rate_Limiter/Saturation Dynamic' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Current_Filtering' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Field_Weakening' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Inv_Clarke_Transform' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Inv_Park_Transform' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Park_Transform' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Voltage_Mode' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform/Clarke_PhasesAB' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform/Clarke_PhasesBC' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Current_Filtering/Low_Pass_Filter' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Current_Limit_Protection' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Speed_Limit_Protection' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Current_Limit_Protection/Saturation Dynamic' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Speed_Limit_Protection/Saturation Dynamic1' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n/Clamping_circuit' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n/Integrator' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n/Saturation_hit' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/Saturation Dynamic' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq/Clamping_circuit' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq/Integrator' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq/Saturation_hit' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/Saturation Dynamic' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id/Clamping_circuit' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id/Integrator' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id/Saturation_hit' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Voltage_Mode/Saturation Dynamic1' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management/F05_00_COM_Method' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management/F05_01_SIN_Method' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management/F05_02_FOC_Method' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management/F05_01_SIN_Method/Phase_Advance_Calculation' - * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management/F05_01_SIN_Method/Phase_Advance_Calculation/Modulo_fixdt' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Weakening' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F06_Control_Type_Management' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/Task_Scheduler' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_01_Edge_Detector' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_02_Position_Calculation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_03_Direction_Detection' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_05_Electrical_Angle_Estimation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation/Counter' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation/Raw_Motor_Speed_Estimation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Speed_Estimation/Counter/rst_Delay' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/either_edge' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Default' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/either_edge' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter/rst_Delay' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter/rst_Delay' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_01_Mode_Transition_Calculation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_02_Control_Mode_Manager' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Default_Control_Type' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Default_Mode' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/FOC_Control_Type' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/Rate_Limiter' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/rising_edge_init' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/Rate_Limiter/Delay_Init1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_03_Input_Target_Synthesis/Open_Mode/Rate_Limiter/Saturation Dynamic' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Weakening/Saturation Dynamic' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Weakening/Saturation Dynamic1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Clarke_Transform' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Current_Filtering' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Inv_Clarke_Transform' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Inv_Park_Transform' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Park_Transform' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Sine_Cosine_Approximation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Clarke_Transform/Clarke_PhasesAB' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Clarke_Transform/Clarke_PhasesBC' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Current_Filtering/Low_Pass_Filter' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Open_Mode' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Speed_Mode' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Torque_Mode' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Vd_Calculation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Voltage_Mode' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Speed_Mode/PI_clamp_fixdt' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Speed_Mode/PI_clamp_fixdt/Clamping_circuit' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Speed_Mode/PI_clamp_fixdt/Integrator' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Speed_Mode/PI_clamp_fixdt/Saturation_hit' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Torque_Mode/PI_clamp_fixdt' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Torque_Mode/Saturation Dynamic1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Torque_Mode/PI_clamp_fixdt/Clamping_circuit' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Torque_Mode/PI_clamp_fixdt/Integrator' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Torque_Mode/PI_clamp_fixdt/Saturation_hit' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Vd_Calculation/PI_clamp_fixdt' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Vd_Calculation/Saturation Dynamic' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Vd_Calculation/PI_clamp_fixdt/Clamping_circuit' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Vd_Calculation/PI_clamp_fixdt/Integrator' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Vd_Calculation/PI_clamp_fixdt/Saturation_hit' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/FOC/Voltage_Mode/Saturation Dynamic1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Speed_Mode_Protection' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Torque_Mode_Protection' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Speed_Mode_Protection/Saturation Dynamic' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Torque_Mode_Protection/I_backCalc_fixdt' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Torque_Mode_Protection/I_backCalc_fixdt/Integrator' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Torque_Mode_Protection/I_backCalc_fixdt/Saturation Dynamic1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection/I_backCalc_fixdt' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection/I_backCalc_fixdt1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection/I_backCalc_fixdt/Integrator' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection/I_backCalc_fixdt/Saturation Dynamic1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection/I_backCalc_fixdt1/Integrator' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Field_Oriented_Control/Motor_Limitations/Voltage_Mode_Protection/I_backCalc_fixdt1/Saturation Dynamic1' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F06_Control_Type_Management/COM_Method' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F06_Control_Type_Management/FOC_Method' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F06_Control_Type_Management/SIN_Method' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F06_Control_Type_Management/SIN_Method/Final_Phase_Advance_Calculation' + * '' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F06_Control_Type_Management/SIN_Method/Final_Phase_Advance_Calculation/Modulo_fixdt' */ #endif /* RTW_HEADER_BLDC_controller_h_ */ diff --git a/Inc/config.h b/Inc/config.h index 00e4eee..21f9d42 100644 --- a/Inc/config.h +++ b/Inc/config.h @@ -123,11 +123,11 @@ * Make, flash and test it. */ #define CONTROL_ADC // use ADC as input. disable CONTROL_SERIAL_USART2, FEEDBACK_SERIAL_USART2, DEBUG_SERIAL_USART2! -#define ADC1_MID_POT // ADC1 middle resting poti: comment-out if NOT a middle resting poti -#define ADC2_MID_POT // ADC2 middle resting poti: comment-out if NOT a middle resting poti +// #define ADC1_MID_POT // ADC1 middle resting poti: comment-out if NOT a middle resting poti #define ADC1_MIN 0 // min ADC1-value while poti at minimum-position (0 - 4095) #define ADC1_MID 1963 // mid ADC1-value while poti at minimum-position (ADC1_MIN - ADC1_MAX) #define ADC1_MAX 4095 // max ADC1-value while poti at maximum-position (0 - 4095) +// #define ADC2_MID_POT // ADC2 middle resting poti: comment-out if NOT a middle resting poti #define ADC2_MIN 0 // min ADC2-value while poti at minimum-position (0 - 4095) #define ADC2_MID 2006 // mid ADC2-value while poti at minimum-position (ADC2_MIN - ADC2_MAX) #define ADC2_MAX 4095 // max ADC2-value while poti at maximum-position (0 - 4095) @@ -141,39 +141,55 @@ // #define CONTROL_NUNCHUCK // use nunchuck as input. disable FEEDBACK_SERIAL_USART3, DEBUG_SERIAL_USART3! -// ############################### MOTOR CONTROL (overwrite) ######################### +// ############################### MOTOR CONTROL ######################### +// Control selections #define CTRL_TYP_SEL 2 // [-] Control type selection: 0 = Commutation , 1 = Sinusoidal, 2 = FOC Field Oriented Control (default) #define CTRL_MOD_REQ 1 // [-] Control mode request: 0 = Open mode, 1 = VOLTAGE mode (default), 2 = SPEED mode, 3 = TORQUE mode. Note: SPEED and TORQUE modes are only available for FOC! #define DIAG_ENA 1 // [-] Motor Diagnostics enable flag: 0 = Disabled, 1 = Enabled (default) -#define FIELD_WEAK_ENA 0 // [-] Field Weakening enable flag: 0 = Disabled (default), 1 = Enabled -#define I_MOT_MAX (15 * A2BIT_CONV) << 4 // [A] Maximum motor current limit (Change only the first number, the rest is needed for fixed-point conversion, fixdt(1,16,4)) -#define I_DC_MAX (17 * A2BIT_CONV) // [A] Maximum DC Link current limit (This is the final current protection. Above this value, current chopping is applied. To avoid this make sure that I_DC_MAX = I_MOT_MAX + 2A ) -#define N_MOT_MAX 800 << 4 // [rpm] Maximum motor speed (change only the first number, the rest is needed for fixed-point conversion, fixdt(1,16,4)) +// Limitation settings +#define I_MOT_MAX 15 // [A] Maximum motor current limit +#define I_DC_MAX 17 // [A] Maximum DC Link current limit (This is the final current protection. Above this value, current chopping is applied. To avoid this make sure that I_DC_MAX = I_MOT_MAX + 2A) +#define N_MOT_MAX 1000 // [rpm] Maximum motor speed limit + +// Field Weakening / Phase Advance +#define FIELD_WEAK_ENA 0 // [-] Field Weakening / Phase Advance enable flag: 0 = Disabled (default), 1 = Enabled +#define FIELD_WEAK_MAX 5 // [A] Maximum Field Weakening D axis current (only for FOC). Higher current results in higher maximum speed. +#define PHASE_ADV_MAX 25 // [deg] Maximum Phase Advance angle (only for SIN). Higher angle results in higher maximum speed. +#define FIELD_WEAK_HI 1500 // [-] Input target High threshold for reaching maximum Field Weakening / Phase Advance. Do NOT set this higher than 1500. +#define FIELD_WEAK_LO 1000 // [-] Input target Low threshold for starting Field Weakening / Phase Advance. Do NOT set this higher than 1000. + +// Data checks - Do NOT touch +#if (FIELD_WEAK_ENA == 0) + #undef FIELD_WEAK_HI + #define FIELD_WEAK_HI 1000 // [-] This prevents the input target going beyond 1000 when Field Weakening is not enabled +#endif +#define INPUT_MAX MAX( 1000, FIELD_WEAK_HI) // [-] Defines the Input target maximum limitation +#define INPUT_MIN MIN(-1000,-FIELD_WEAK_HI) // [-] Defines the Input target minimum limitation +#define INPUT_MID INPUT_MAX / 2 /* GENERAL NOTES: * 1. The above parameters are over-writing the default motor parameters. For all the available parameters check BLDC_controller_data.c * 2. The parameters are represented in fixed point data type for a more efficient code execution * 3. For calibrating the fixed-point parameters use the Fixed-Point Viewer tool (see ) * 4. For more details regarding the parameters and the working principle of the controller please consult the Simulink model - * 5. A webview was created, so Matlab/Simulink installation is not needed, unless you want to regenerate the code + * 5. A webview was created, so Matlab/Simulink installation is not needed, unless you want to regenerate the code. The webview is an html page that can be opened with browsers like: Microsoft Internet Explorer or Microsoft Edge * - * NOTES Field weakening: - * 1. In BLDC_controller_data.c you can find the field weakening Map as a function of input target: MAP = id_fieldWeak_M1, XAXIS = r_fieldWeak_XA - * 2. The default calibration was experimentally calibrated to my particular needs - * 3. If you re-calibrate the field weakening map please take all the safety measures! The motors can spin very fast! - * 4. During the recalibration make sure the values in XAXIS are equally spaced for a correct Map interpolation. + * NOTES Field Weakening / Phase Advance: + * 1. The Field Weakening is a linear interpolation from 0 to FIELD_WEAK_MAX or PHASE_ADV_MAX (depeding if FOC or SIN is selected, respectively) + * 2. The Field Weakening starts engaging at FIELD_WEAK_LO and reaches the maximum value at FIELD_WEAK_HI + * 3. If you re-calibrate the Field Weakening please take all the safety measures! The motors can spin very fast! */ // ############################### DRIVING BEHAVIOR ############################### /* Inputs: - * - cmd1 and cmd2: analog normalized input values. -1000 to 1000 + * - cmd1 and cmd2: analog normalized input values. INPUT_MIN to INPUT_MAX * - button1 and button2: digital input values. 0 or 1 * - adc_buffer.l_tx2 and adc_buffer.l_rx2: unfiltered ADC values (you do not need them). 0 to 4095 * Outputs: - * - speedR and speedL: normal driving -1000 to 1000 + * - speedR and speedL: normal driving INPUT_MIN to INPUT_MAX */ // Value of RATE is in fixdt(1,16,4): VAL_fixedPoint = VAL_floatingPoint * 2^4. In this case 480 = 30 * 2^4 diff --git a/Inc/rtwtypes.h b/Inc/rtwtypes.h index 51b2686..0731f04 100644 --- a/Inc/rtwtypes.h +++ b/Inc/rtwtypes.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1212 + * Model version : 1.1249 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Sat Nov 30 08:54:28 2019 + * C/C++ source code generated on : Thu Dec 12 20:22:31 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex diff --git a/Src/BLDC_controller.c b/Src/BLDC_controller.c index 561ee33..54551bf 100644 --- a/Src/BLDC_controller.c +++ b/Src/BLDC_controller.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1212 + * Model version : 1.1249 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Sat Nov 30 08:54:28 2019 + * C/C++ source code generated on : Thu Dec 12 20:22:31 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex @@ -97,32 +97,26 @@ uint8_T plook_u8s16_evencka(int16_T u, int16_T bp0, uint16_T bpSpace, uint32_T maxIndex); uint8_T plook_u8u16_evencka(uint16_T u, uint16_T bp0, uint16_T bpSpace, uint32_T maxIndex); -uint8_T plook_u8s16u8n7_evenc_s(int16_T u, int16_T bp0, uint16_T bpSpace, - uint32_T maxIndex, uint8_T *fraction); -int16_T intrp1d_s16s32s32u8u8n7l_s(uint8_T bpIndex, uint8_T frac, const int16_T - table[]); int32_T div_nde_s32_floor(int32_T numerator, int32_T denominator); extern void Counter_Init(DW_Counter *localDW, int16_T rtp_z_cntInit); extern int16_T Counter(int16_T rtu_inc, int16_T rtu_max, boolean_T rtu_rst, DW_Counter *localDW); -extern void PI_clamp_fixdt_Reset(DW_PI_clamp_fixdt *localDW); extern void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T rtu_satMax, int16_T rtu_satMin, int32_T rtu_ext_limProt, int16_T *rty_out, DW_PI_clamp_fixdt *localDW); extern void Low_Pass_Filter_Reset(DW_Low_Pass_Filter *localDW); extern void Low_Pass_Filter(const int16_T rtu_u[2], uint16_T rtu_coef, int16_T rty_y[2], DW_Low_Pass_Filter *localDW); -extern void PI_clamp_fixdt_n_Reset(DW_PI_clamp_fixdt_c *localDW); -extern int16_T PI_clamp_fixdt_n(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, - int16_T rtu_satMax, int16_T rtu_satMin, int16_T rtu_ext_limProt, - DW_PI_clamp_fixdt_c *localDW); +extern void I_backCalc_fixdt_Init(DW_I_backCalc_fixdt *localDW, int32_T + rtp_yInit); +extern void I_backCalc_fixdt(int16_T rtu_err, uint16_T rtu_I, uint16_T rtu_Kb, + int16_T rtu_satMax, int16_T rtu_satMin, int16_T *rty_out, DW_I_backCalc_fixdt * + localDW); extern void Counter_b_Init(DW_Counter_l *localDW, uint16_T rtp_z_cntInit); extern uint16_T Counter_i(uint16_T rtu_inc, uint16_T rtu_max, boolean_T rtu_rst, DW_Counter_l *localDW); -extern void either_edge_Reset(DW_either_edge *localDW); extern boolean_T either_edge(boolean_T rtu_u, DW_either_edge *localDW); extern void Debounce_Filter_Init(DW_Debounce_Filter *localDW); -extern void Debounce_Filter_Reset(DW_Debounce_Filter *localDW); extern void Debounce_Filter(boolean_T rtu_u, uint16_T rtu_tAcv, uint16_T rtu_tDeacv, boolean_T *rty_y, DW_Debounce_Filter *localDW); uint8_T plook_u8s16_evencka(int16_T u, int16_T bp0, uint16_T bpSpace, uint32_T @@ -179,79 +173,29 @@ uint8_T plook_u8u16_evencka(uint16_T u, uint16_T bp0, uint16_T bpSpace, uint32_T return bpIndex; } -uint8_T plook_u8s16u8n7_evenc_s(int16_T u, int16_T bp0, uint16_T bpSpace, - uint32_T maxIndex, uint8_T *fraction) -{ - uint8_T bpIndex; - uint16_T uAdjust; - uint16_T fbpIndex; - - /* Prelookup - Index and Fraction - Index Search method: 'even' - Extrapolation method: 'Clip' - Use previous index: 'off' - Use last breakpoint for index at or above upper limit: 'off' - Remove protection against out-of-range input in generated code: 'off' - Rounding mode: 'simplest' - */ - if (u <= bp0) { - bpIndex = 0U; - *fraction = 0U; - } else { - uAdjust = (uint16_T)(u - bp0); - fbpIndex = (uint16_T)((uint32_T)uAdjust / bpSpace); - if (fbpIndex < maxIndex) { - bpIndex = (uint8_T)fbpIndex; - *fraction = (uint8_T)(((uint32_T)(uint16_T)((uint32_T)uAdjust - (uint16_T) - ((uint32_T)bpIndex * bpSpace)) << 7) / bpSpace); - } else { - bpIndex = (uint8_T)(maxIndex - 1U); - *fraction = 128U; - } - } - - return bpIndex; -} - -int16_T intrp1d_s16s32s32u8u8n7l_s(uint8_T bpIndex, uint8_T frac, const int16_T - table[]) -{ - uint32_T offset_0d; - - /* Interpolation 1-D - Interpolation method: 'Linear' - Use last breakpoint for index at or above upper limit: 'off' - Rounding mode: 'simplest' - Overflow mode: 'wrapping' - */ - offset_0d = bpIndex; - return (int16_T)((int16_T)(((table[offset_0d + 1U] - table[offset_0d]) * frac) - >> 7) + table[offset_0d]); -} - int32_T div_nde_s32_floor(int32_T numerator, int32_T denominator) { return (((numerator < 0) != (denominator < 0)) && (numerator % denominator != 0) ? -1 : 0) + numerator / denominator; } -/* System initialize for atomic system: '/Counter' */ +/* System initialize for atomic system: '/Counter' */ void Counter_Init(DW_Counter *localDW, int16_T rtp_z_cntInit) { - /* InitializeConditions for UnitDelay: '/UnitDelay' */ + /* InitializeConditions for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rtp_z_cntInit; } -/* Output and update for atomic system: '/Counter' */ +/* Output and update for atomic system: '/Counter' */ int16_T Counter(int16_T rtu_inc, int16_T rtu_max, boolean_T rtu_rst, DW_Counter * localDW) { int16_T rtu_rst_0; int16_T rty_cnt_0; - /* Switch: '/Switch1' incorporates: - * Constant: '/Constant23' - * UnitDelay: '/UnitDelay' + /* Switch: '/Switch1' incorporates: + * Constant: '/Constant23' + * UnitDelay: '/UnitDelay' */ if (rtu_rst) { rtu_rst_0 = 0; @@ -259,56 +203,43 @@ int16_T Counter(int16_T rtu_inc, int16_T rtu_max, boolean_T rtu_rst, DW_Counter rtu_rst_0 = localDW->UnitDelay_DSTATE; } - /* End of Switch: '/Switch1' */ + /* End of Switch: '/Switch1' */ - /* Sum: '/Sum1' */ + /* Sum: '/Sum1' */ rty_cnt_0 = (int16_T)(rtu_inc + rtu_rst_0); - /* MinMax: '/MinMax' */ + /* MinMax: '/MinMax' */ if (rty_cnt_0 < rtu_max) { - /* Update for UnitDelay: '/UnitDelay' */ + /* Update for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rty_cnt_0; } else { - /* Update for UnitDelay: '/UnitDelay' */ + /* Update for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rtu_max; } - /* End of MinMax: '/MinMax' */ + /* End of MinMax: '/MinMax' */ return rty_cnt_0; } -/* - * System reset for atomic system: - * '/PI_clamp_fixdt_id' - * '/PI_clamp_fixdt_iq' - */ -void PI_clamp_fixdt_Reset(DW_PI_clamp_fixdt *localDW) -{ - /* InitializeConditions for UnitDelay: '/UnitDelay1' */ - localDW->UnitDelay1_DSTATE = false; - - /* InitializeConditions for UnitDelay: '/UnitDelay' */ - localDW->UnitDelay_DSTATE = 0; -} - /* * Output and update for atomic system: - * '/PI_clamp_fixdt_id' - * '/PI_clamp_fixdt_iq' + * '/PI_clamp_fixdt' + * '/PI_clamp_fixdt' + * '/PI_clamp_fixdt' */ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T rtu_satMax, int16_T rtu_satMin, int32_T rtu_ext_limProt, int16_T *rty_out, DW_PI_clamp_fixdt *localDW) { - boolean_T rtb_LowerRelop1_e; - boolean_T rtb_UpperRelop_f; - int32_T rtb_Sum1_b4; + boolean_T rtb_LowerRelop1_c; + boolean_T rtb_UpperRelop_e; + int32_T rtb_Sum1_n; int32_T q0; int32_T tmp; int16_T tmp_0; - /* Sum: '/Sum2' incorporates: - * Product: '/Divide2' + /* Sum: '/Sum2' incorporates: + * Product: '/Divide2' */ q0 = rtu_err * rtu_I; if ((q0 < 0) && (rtu_ext_limProt < MIN_int32_T - q0)) { @@ -319,10 +250,10 @@ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T q0 += rtu_ext_limProt; } - /* Switch: '/Switch1' incorporates: - * Constant: '/a_elecPeriod1' - * Sum: '/Sum2' - * UnitDelay: '/UnitDelay1' + /* Switch: '/Switch1' incorporates: + * Constant: '/Constant' + * Sum: '/Sum2' + * UnitDelay: '/UnitDelay1' */ if (localDW->UnitDelay1_DSTATE) { tmp = 0; @@ -330,14 +261,14 @@ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T tmp = q0; } - /* End of Switch: '/Switch1' */ + /* End of Switch: '/Switch1' */ - /* Sum: '/Sum1' incorporates: - * UnitDelay: '/UnitDelay' + /* Sum: '/Sum1' incorporates: + * UnitDelay: '/UnitDelay' */ - rtb_Sum1_b4 = tmp + localDW->UnitDelay_DSTATE; + rtb_Sum1_n = tmp + localDW->UnitDelay_DSTATE; - /* Product: '/Divide5' */ + /* Product: '/Divide5' */ tmp = (rtu_err * rtu_P) >> 11; if (tmp > 32767) { tmp = 32767; @@ -347,11 +278,11 @@ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T } } - /* Sum: '/Sum1' incorporates: - * DataTypeConversion: '/Data Type Conversion1' - * Product: '/Divide5' + /* Sum: '/Sum1' incorporates: + * DataTypeConversion: '/Data Type Conversion1' + * Product: '/Divide5' */ - tmp = (((rtb_Sum1_b4 >> 16) << 1) + tmp) >> 1; + tmp = (((rtb_Sum1_n >> 16) << 1) + tmp) >> 1; if (tmp > 32767) { tmp = 32767; } else { @@ -360,33 +291,33 @@ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T } } - /* RelationalOperator: '/LowerRelop1' incorporates: - * Sum: '/Sum1' + /* RelationalOperator: '/LowerRelop1' incorporates: + * Sum: '/Sum1' */ - rtb_LowerRelop1_e = ((int16_T)tmp > rtu_satMax); + rtb_LowerRelop1_c = ((int16_T)tmp > rtu_satMax); - /* RelationalOperator: '/UpperRelop' incorporates: - * Sum: '/Sum1' + /* RelationalOperator: '/UpperRelop' incorporates: + * Sum: '/Sum1' */ - rtb_UpperRelop_f = ((int16_T)tmp < rtu_satMin); + rtb_UpperRelop_e = ((int16_T)tmp < rtu_satMin); - /* Switch: '/Switch1' incorporates: - * Sum: '/Sum1' - * Switch: '/Switch3' + /* Switch: '/Switch1' incorporates: + * Sum: '/Sum1' + * Switch: '/Switch3' */ - if (rtb_LowerRelop1_e) { + if (rtb_LowerRelop1_c) { *rty_out = rtu_satMax; - } else if (rtb_UpperRelop_f) { - /* Switch: '/Switch3' */ + } else if (rtb_UpperRelop_e) { + /* Switch: '/Switch3' */ *rty_out = rtu_satMin; } else { *rty_out = (int16_T)tmp; } - /* End of Switch: '/Switch1' */ + /* End of Switch: '/Switch1' */ - /* Signum: '/SignDeltaU2' incorporates: - * Sum: '/Sum2' + /* Signum: '/SignDeltaU2' incorporates: + * Sum: '/Sum2' */ if (q0 < 0) { q0 = -1; @@ -394,10 +325,10 @@ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T q0 = (q0 > 0); } - /* End of Signum: '/SignDeltaU2' */ + /* End of Signum: '/SignDeltaU2' */ - /* Signum: '/SignDeltaU3' incorporates: - * Sum: '/Sum1' + /* Signum: '/SignDeltaU3' incorporates: + * Sum: '/Sum1' */ if ((int16_T)tmp < 0) { tmp_0 = -1; @@ -405,22 +336,22 @@ void PI_clamp_fixdt(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, int16_T tmp_0 = (int16_T)((int16_T)tmp > 0); } - /* End of Signum: '/SignDeltaU3' */ + /* End of Signum: '/SignDeltaU3' */ - /* Update for UnitDelay: '/UnitDelay1' incorporates: - * DataTypeConversion: '/DataTypeConv4' - * Logic: '/AND1' - * Logic: '/AND1' - * RelationalOperator: '/Equal1' + /* Update for UnitDelay: '/UnitDelay1' incorporates: + * DataTypeConversion: '/DataTypeConv4' + * Logic: '/AND1' + * Logic: '/AND1' + * RelationalOperator: '/Equal1' */ - localDW->UnitDelay1_DSTATE = ((q0 == tmp_0) && (rtb_LowerRelop1_e || - rtb_UpperRelop_f)); + localDW->UnitDelay1_DSTATE = ((q0 == tmp_0) && (rtb_LowerRelop1_c || + rtb_UpperRelop_e)); - /* Update for UnitDelay: '/UnitDelay' */ - localDW->UnitDelay_DSTATE = rtb_Sum1_b4; + /* Update for UnitDelay: '/UnitDelay' */ + localDW->UnitDelay_DSTATE = rtb_Sum1_n; } -/* System reset for atomic system: '/Low_Pass_Filter' */ +/* System reset for atomic system: '/Low_Pass_Filter' */ void Low_Pass_Filter_Reset(DW_Low_Pass_Filter *localDW) { /* InitializeConditions for UnitDelay: '/UnitDelay3' */ @@ -428,7 +359,7 @@ void Low_Pass_Filter_Reset(DW_Low_Pass_Filter *localDW) localDW->UnitDelay3_DSTATE[1] = 0; } -/* Output and update for atomic system: '/Low_Pass_Filter' */ +/* Output and update for atomic system: '/Low_Pass_Filter' */ void Low_Pass_Filter(const int16_T rtu_u[2], uint16_T rtu_coef, int16_T rty_y[2], DW_Low_Pass_Filter *localDW) { @@ -460,159 +391,98 @@ void Low_Pass_Filter(const int16_T rtu_u[2], uint16_T rtu_coef, int16_T rty_y[2] localDW->UnitDelay3_DSTATE[1] = rty_y[1]; } -/* System reset for atomic system: '/PI_clamp_fixdt_n' */ -void PI_clamp_fixdt_n_Reset(DW_PI_clamp_fixdt_c *localDW) +/* + * System initialize for atomic system: + * '/I_backCalc_fixdt' + * '/I_backCalc_fixdt1' + * '/I_backCalc_fixdt' + */ +void I_backCalc_fixdt_Init(DW_I_backCalc_fixdt *localDW, int32_T rtp_yInit) { - /* InitializeConditions for UnitDelay: '/UnitDelay1' */ - localDW->UnitDelay1_DSTATE = false; - - /* InitializeConditions for UnitDelay: '/UnitDelay' */ - localDW->UnitDelay_DSTATE = 0; + /* InitializeConditions for UnitDelay: '/UnitDelay' */ + localDW->UnitDelay_DSTATE_h = rtp_yInit; } -/* Output and update for atomic system: '/PI_clamp_fixdt_n' */ -int16_T PI_clamp_fixdt_n(int16_T rtu_err, uint16_T rtu_P, uint16_T rtu_I, - int16_T rtu_satMax, int16_T rtu_satMin, int16_T rtu_ext_limProt, - DW_PI_clamp_fixdt_c *localDW) +/* + * Output and update for atomic system: + * '/I_backCalc_fixdt' + * '/I_backCalc_fixdt1' + * '/I_backCalc_fixdt' + */ +void I_backCalc_fixdt(int16_T rtu_err, uint16_T rtu_I, uint16_T rtu_Kb, int16_T + rtu_satMax, int16_T rtu_satMin, int16_T *rty_out, + DW_I_backCalc_fixdt *localDW) { - boolean_T rtb_LowerRelop1_ge; - boolean_T rtb_UpperRelop_o; - int32_T rtb_Sum1_mz; - int32_T q0; - int32_T q1; - int16_T tmp; - int16_T rty_out_0; + int32_T rtb_Sum1_e0; + int16_T rtb_DataTypeConversion1_no; - /* Sum: '/Sum2' incorporates: - * Product: '/Divide2' + /* Sum: '/Sum2' incorporates: + * Product: '/Divide2' + * UnitDelay: '/UnitDelay' */ - q0 = rtu_err * rtu_I; - q1 = rtu_ext_limProt << 10; - if ((q0 < 0) && (q1 < MIN_int32_T - q0)) { - q0 = MIN_int32_T; - } else if ((q0 > 0) && (q1 > MAX_int32_T - q0)) { - q0 = MAX_int32_T; + rtb_Sum1_e0 = (rtu_err * rtu_I) >> 4; + if ((rtb_Sum1_e0 < 0) && (localDW->UnitDelay_DSTATE < MIN_int32_T + - rtb_Sum1_e0)) { + rtb_Sum1_e0 = MIN_int32_T; + } else if ((rtb_Sum1_e0 > 0) && (localDW->UnitDelay_DSTATE > MAX_int32_T + - rtb_Sum1_e0)) { + rtb_Sum1_e0 = MAX_int32_T; } else { - q0 += q1; + rtb_Sum1_e0 += localDW->UnitDelay_DSTATE; } - /* Switch: '/Switch1' incorporates: - * Constant: '/a_elecPeriod1' - * Sum: '/Sum2' - * UnitDelay: '/UnitDelay1' + /* End of Sum: '/Sum2' */ + + /* Sum: '/Sum1' incorporates: + * UnitDelay: '/UnitDelay' */ - if (localDW->UnitDelay1_DSTATE) { - q1 = 0; + rtb_Sum1_e0 += localDW->UnitDelay_DSTATE_h; + + /* DataTypeConversion: '/Data Type Conversion1' */ + rtb_DataTypeConversion1_no = (int16_T)(rtb_Sum1_e0 >> 12); + + /* Switch: '/Switch2' incorporates: + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtb_DataTypeConversion1_no > rtu_satMax) { + *rty_out = rtu_satMax; + } else if (rtb_DataTypeConversion1_no < rtu_satMin) { + /* Switch: '/Switch' */ + *rty_out = rtu_satMin; } else { - q1 = q0; + *rty_out = rtb_DataTypeConversion1_no; } - /* End of Switch: '/Switch1' */ + /* End of Switch: '/Switch2' */ - /* Sum: '/Sum1' incorporates: - * UnitDelay: '/UnitDelay' + /* Update for UnitDelay: '/UnitDelay' incorporates: + * Product: '/Divide1' + * Sum: '/Sum3' */ - rtb_Sum1_mz = q1 + localDW->UnitDelay_DSTATE; + localDW->UnitDelay_DSTATE = (int16_T)(*rty_out - rtb_DataTypeConversion1_no) * + rtu_Kb; - /* Product: '/Divide5' */ - q1 = (rtu_err * rtu_P) >> 11; - if (q1 > 32767) { - q1 = 32767; - } else { - if (q1 < -32768) { - q1 = -32768; - } - } - - /* Sum: '/Sum1' incorporates: - * DataTypeConversion: '/Data Type Conversion1' - * Product: '/Divide5' - */ - q1 = (((rtb_Sum1_mz >> 16) << 1) + q1) >> 1; - if (q1 > 32767) { - q1 = 32767; - } else { - if (q1 < -32768) { - q1 = -32768; - } - } - - /* RelationalOperator: '/LowerRelop1' incorporates: - * Sum: '/Sum1' - */ - rtb_LowerRelop1_ge = ((int16_T)q1 > rtu_satMax); - - /* RelationalOperator: '/UpperRelop' incorporates: - * Sum: '/Sum1' - */ - rtb_UpperRelop_o = ((int16_T)q1 < rtu_satMin); - - /* Switch: '/Switch1' incorporates: - * Sum: '/Sum1' - * Switch: '/Switch3' - */ - if (rtb_LowerRelop1_ge) { - rty_out_0 = rtu_satMax; - } else if (rtb_UpperRelop_o) { - /* Switch: '/Switch3' */ - rty_out_0 = rtu_satMin; - } else { - rty_out_0 = (int16_T)q1; - } - - /* End of Switch: '/Switch1' */ - - /* Signum: '/SignDeltaU2' incorporates: - * Sum: '/Sum2' - */ - if (q0 < 0) { - q0 = -1; - } else { - q0 = (q0 > 0); - } - - /* End of Signum: '/SignDeltaU2' */ - - /* Signum: '/SignDeltaU3' incorporates: - * Sum: '/Sum1' - */ - if ((int16_T)q1 < 0) { - tmp = -1; - } else { - tmp = (int16_T)((int16_T)q1 > 0); - } - - /* End of Signum: '/SignDeltaU3' */ - - /* Update for UnitDelay: '/UnitDelay1' incorporates: - * DataTypeConversion: '/DataTypeConv4' - * Logic: '/AND1' - * Logic: '/AND1' - * RelationalOperator: '/Equal1' - */ - localDW->UnitDelay1_DSTATE = ((q0 == tmp) && (rtb_LowerRelop1_ge || - rtb_UpperRelop_o)); - - /* Update for UnitDelay: '/UnitDelay' */ - localDW->UnitDelay_DSTATE = rtb_Sum1_mz; - return rty_out_0; + /* Update for UnitDelay: '/UnitDelay' */ + localDW->UnitDelay_DSTATE_h = rtb_Sum1_e0; } /* * System initialize for atomic system: - * '/Counter' - * '/Counter' + * '/Counter' + * '/Counter' */ void Counter_b_Init(DW_Counter_l *localDW, uint16_T rtp_z_cntInit) { - /* InitializeConditions for UnitDelay: '/UnitDelay' */ + /* InitializeConditions for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rtp_z_cntInit; } /* * Output and update for atomic system: - * '/Counter' - * '/Counter' + * '/Counter' + * '/Counter' */ uint16_T Counter_i(uint16_T rtu_inc, uint16_T rtu_max, boolean_T rtu_rst, DW_Counter_l *localDW) @@ -620,9 +490,9 @@ uint16_T Counter_i(uint16_T rtu_inc, uint16_T rtu_max, boolean_T rtu_rst, uint16_T rtu_rst_0; uint16_T rty_cnt_0; - /* Switch: '/Switch1' incorporates: - * Constant: '/Constant23' - * UnitDelay: '/UnitDelay' + /* Switch: '/Switch1' incorporates: + * Constant: '/Constant23' + * UnitDelay: '/UnitDelay' */ if (rtu_rst) { rtu_rst_0 = 0U; @@ -630,50 +500,39 @@ uint16_T Counter_i(uint16_T rtu_inc, uint16_T rtu_max, boolean_T rtu_rst, rtu_rst_0 = localDW->UnitDelay_DSTATE; } - /* End of Switch: '/Switch1' */ + /* End of Switch: '/Switch1' */ - /* Sum: '/Sum1' */ + /* Sum: '/Sum1' */ rty_cnt_0 = (uint16_T)((uint32_T)rtu_inc + rtu_rst_0); - /* MinMax: '/MinMax' */ + /* MinMax: '/MinMax' */ if (rty_cnt_0 < rtu_max) { - /* Update for UnitDelay: '/UnitDelay' */ + /* Update for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rty_cnt_0; } else { - /* Update for UnitDelay: '/UnitDelay' */ + /* Update for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rtu_max; } - /* End of MinMax: '/MinMax' */ + /* End of MinMax: '/MinMax' */ return rty_cnt_0; } -/* - * System reset for atomic system: - * '/either_edge' - * '/either_edge' - */ -void either_edge_Reset(DW_either_edge *localDW) -{ - /* InitializeConditions for UnitDelay: '/UnitDelay' */ - localDW->UnitDelay_DSTATE = false; -} - /* * Output and update for atomic system: - * '/either_edge' + * '/either_edge' * '/either_edge' */ boolean_T either_edge(boolean_T rtu_u, DW_either_edge *localDW) { boolean_T rty_y_0; - /* RelationalOperator: '/Relational Operator' incorporates: - * UnitDelay: '/UnitDelay' + /* RelationalOperator: '/Relational Operator' incorporates: + * UnitDelay: '/UnitDelay' */ rty_y_0 = (rtu_u != localDW->UnitDelay_DSTATE); - /* Update for UnitDelay: '/UnitDelay' */ + /* Update for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = rtu_u; return rty_y_0; } @@ -681,107 +540,98 @@ boolean_T either_edge(boolean_T rtu_u, DW_either_edge *localDW) /* System initialize for atomic system: '/Debounce_Filter' */ void Debounce_Filter_Init(DW_Debounce_Filter *localDW) { - /* SystemInitialize for IfAction SubSystem: '/Qualification' */ + /* SystemInitialize for IfAction SubSystem: '/Qualification' */ - /* SystemInitialize for Atomic SubSystem: '/Counter' */ + /* SystemInitialize for Atomic SubSystem: '/Counter' */ Counter_b_Init(&localDW->Counter_i0, 0U); - /* End of SystemInitialize for SubSystem: '/Counter' */ + /* End of SystemInitialize for SubSystem: '/Counter' */ - /* End of SystemInitialize for SubSystem: '/Qualification' */ + /* End of SystemInitialize for SubSystem: '/Qualification' */ - /* SystemInitialize for IfAction SubSystem: '/Dequalification' */ + /* SystemInitialize for IfAction SubSystem: '/Dequalification' */ - /* SystemInitialize for Atomic SubSystem: '/Counter' */ + /* SystemInitialize for Atomic SubSystem: '/Counter' */ Counter_b_Init(&localDW->Counter_h, 0U); - /* End of SystemInitialize for SubSystem: '/Counter' */ + /* End of SystemInitialize for SubSystem: '/Counter' */ - /* End of SystemInitialize for SubSystem: '/Dequalification' */ -} - -/* System reset for atomic system: '/Debounce_Filter' */ -void Debounce_Filter_Reset(DW_Debounce_Filter *localDW) -{ - /* InitializeConditions for UnitDelay: '/UnitDelay' */ - localDW->UnitDelay_DSTATE = false; - - /* SystemReset for Atomic SubSystem: '/either_edge' */ - either_edge_Reset(&localDW->either_edge_k); - - /* End of SystemReset for SubSystem: '/either_edge' */ + /* End of SystemInitialize for SubSystem: '/Dequalification' */ } /* Output and update for atomic system: '/Debounce_Filter' */ void Debounce_Filter(boolean_T rtu_u, uint16_T rtu_tAcv, uint16_T rtu_tDeacv, boolean_T *rty_y, DW_Debounce_Filter *localDW) { - uint16_T rtb_Sum1_l; + boolean_T rtb_UnitDelay_o; + uint16_T rtb_Sum1_g3; boolean_T rtb_RelationalOperator_f; - /* Outputs for Atomic SubSystem: '/either_edge' */ + /* UnitDelay: '/UnitDelay' */ + rtb_UnitDelay_o = localDW->UnitDelay_DSTATE; + + /* Outputs for Atomic SubSystem: '/either_edge' */ rtb_RelationalOperator_f = either_edge(rtu_u, &localDW->either_edge_k); - /* End of Outputs for SubSystem: '/either_edge' */ + /* End of Outputs for SubSystem: '/either_edge' */ - /* If: '/If2' incorporates: - * Constant: '/Constant6' - * Constant: '/Constant6' - * Inport: '/yPrev' - * Logic: '/Logical Operator1' - * Logic: '/Logical Operator2' - * Logic: '/Logical Operator3' - * Logic: '/Logical Operator4' - * UnitDelay: '/UnitDelay' + /* If: '/If2' incorporates: + * Constant: '/Constant6' + * Constant: '/Constant6' + * Inport: '/yPrev' + * Logic: '/Logical Operator1' + * Logic: '/Logical Operator2' + * Logic: '/Logical Operator3' + * Logic: '/Logical Operator4' */ - if (rtu_u && (!localDW->UnitDelay_DSTATE)) { - /* Outputs for IfAction SubSystem: '/Qualification' incorporates: - * ActionPort: '/Action Port' + if (rtu_u && (!rtb_UnitDelay_o)) { + /* Outputs for IfAction SubSystem: '/Qualification' incorporates: + * ActionPort: '/Action Port' */ - /* Outputs for Atomic SubSystem: '/Counter' */ - rtb_Sum1_l = (uint16_T) Counter_i(1U, rtu_tAcv, rtb_RelationalOperator_f, + /* Outputs for Atomic SubSystem: '/Counter' */ + rtb_Sum1_g3 = (uint16_T) Counter_i(1U, rtu_tAcv, rtb_RelationalOperator_f, &localDW->Counter_i0); - /* End of Outputs for SubSystem: '/Counter' */ + /* End of Outputs for SubSystem: '/Counter' */ - /* Switch: '/Switch2' incorporates: - * Constant: '/Constant6' - * RelationalOperator: '/Relational Operator2' + /* Switch: '/Switch2' incorporates: + * Constant: '/Constant6' + * RelationalOperator: '/Relational Operator2' */ - *rty_y = ((rtb_Sum1_l > rtu_tAcv) || localDW->UnitDelay_DSTATE); + *rty_y = (rtb_Sum1_g3 > rtu_tAcv); - /* End of Outputs for SubSystem: '/Qualification' */ - } else if ((!rtu_u) && localDW->UnitDelay_DSTATE) { - /* Outputs for IfAction SubSystem: '/Dequalification' incorporates: - * ActionPort: '/Action Port' + /* End of Outputs for SubSystem: '/Qualification' */ + } else if ((!rtu_u) && rtb_UnitDelay_o) { + /* Outputs for IfAction SubSystem: '/Dequalification' incorporates: + * ActionPort: '/Action Port' */ - /* Outputs for Atomic SubSystem: '/Counter' */ - rtb_Sum1_l = (uint16_T) Counter_i(1U, rtu_tDeacv, rtb_RelationalOperator_f, + /* Outputs for Atomic SubSystem: '/Counter' */ + rtb_Sum1_g3 = (uint16_T) Counter_i(1U, rtu_tDeacv, rtb_RelationalOperator_f, &localDW->Counter_h); - /* End of Outputs for SubSystem: '/Counter' */ + /* End of Outputs for SubSystem: '/Counter' */ - /* Switch: '/Switch2' incorporates: - * Constant: '/Constant6' - * RelationalOperator: '/Relational Operator2' + /* Switch: '/Switch2' incorporates: + * Constant: '/Constant6' + * RelationalOperator: '/Relational Operator2' */ - *rty_y = ((!(rtb_Sum1_l > rtu_tDeacv)) && localDW->UnitDelay_DSTATE); + *rty_y = !(rtb_Sum1_g3 > rtu_tDeacv); - /* End of Outputs for SubSystem: '/Dequalification' */ + /* End of Outputs for SubSystem: '/Dequalification' */ } else { - /* Outputs for IfAction SubSystem: '/Default' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/Default' incorporates: + * ActionPort: '/Action Port' */ - *rty_y = localDW->UnitDelay_DSTATE; + *rty_y = rtb_UnitDelay_o; - /* End of Outputs for SubSystem: '/Default' */ + /* End of Outputs for SubSystem: '/Default' */ } - /* End of If: '/If2' */ + /* End of If: '/If2' */ - /* Update for UnitDelay: '/UnitDelay' */ + /* Update for UnitDelay: '/UnitDelay' */ localDW->UnitDelay_DSTATE = *rty_y; } @@ -794,36 +644,33 @@ void BLDC_controller_step(RT_MODEL *const rtM) ExtY *rtY = (ExtY *) rtM->outputs; uint8_T rtb_Sum; boolean_T rtb_LogicalOperator; + boolean_T rtb_RelationalOperator9; int8_T rtb_Sum2_h; boolean_T rtb_RelationalOperator4_d; boolean_T rtb_RelationalOperator1_m; uint8_T rtb_Sum_l; - uint8_T rtb_r_fieldWeak_XA_o1; int16_T rtb_Switch2_k; int16_T rtb_Abs5; int16_T rtb_Switch2_fl; int16_T rtb_Switch1_l; + int16_T rtb_DataTypeConversion2; + int16_T rtb_Saturation1; + int16_T rtb_Switch2_l; int16_T rtb_Merge; - int16_T rtb_Merge1; + int16_T rtb_toNegative; int32_T rtb_DataTypeConversion; - int16_T rtb_Saturation; int32_T rtb_Switch1; int32_T rtb_Sum1; int32_T rtb_Gain3; - int16_T rtb_toNegative; - int16_T rtb_Gain4; - uint8_T rtb_r_fieldWeak_XA_o2; - int16_T rtb_Gain2_f; - int16_T rtb_id_fieldWeak_M1; - int16_T rtb_MinMax2; int16_T rtb_TmpSignalConversionAtLow_Pa[2]; int16_T tmp[4]; int8_T UnitDelay3; + int16_T rtb_Merge_f_idx_1; /* Outputs for Atomic SubSystem: '/BLDC_controller' */ - /* Sum: '/Sum' incorporates: - * Gain: '/g_Ha' - * Gain: '/g_Hb' + /* Sum: '/Sum' incorporates: + * Gain: '/g_Ha' + * Gain: '/g_Hb' * Inport: '/b_hallA ' * Inport: '/b_hallB' * Inport: '/b_hallC' @@ -831,85 +678,85 @@ void BLDC_controller_step(RT_MODEL *const rtM) rtb_Sum = (uint8_T)((uint32_T)(uint8_T)((uint32_T)(uint8_T)(rtU->b_hallA << 2) + (uint8_T)(rtU->b_hallB << 1)) + rtU->b_hallC); - /* Logic: '/Logical Operator' incorporates: + /* Logic: '/Logical Operator' incorporates: * Inport: '/b_hallA ' * Inport: '/b_hallB' * Inport: '/b_hallC' - * UnitDelay: '/UnitDelay1' - * UnitDelay: '/UnitDelay2' - * UnitDelay: '/UnitDelay3' + * UnitDelay: '/UnitDelay1' + * UnitDelay: '/UnitDelay2' + * UnitDelay: '/UnitDelay3' */ rtb_LogicalOperator = (boolean_T)((rtU->b_hallA != 0) ^ (rtU->b_hallB != 0) ^ (rtU->b_hallC != 0) ^ (rtDW->UnitDelay3_DSTATE_fy != 0) ^ (rtDW->UnitDelay1_DSTATE != 0)) ^ (rtDW->UnitDelay2_DSTATE_f != 0); - /* If: '/If2' incorporates: + /* If: '/If2' incorporates: * If: '/If2' - * Inport: '/z_counterRawPrev' - * UnitDelay: '/UnitDelay3' + * Inport: '/z_counterRawPrev' + * UnitDelay: '/UnitDelay3' */ if (rtb_LogicalOperator) { /* Outputs for IfAction SubSystem: '/F01_03_Direction_Detection' incorporates: - * ActionPort: '/Action Port' + * ActionPort: '/Action Port' */ - /* UnitDelay: '/UnitDelay3' */ - UnitDelay3 = rtDW->Switch2; + /* UnitDelay: '/UnitDelay3' */ + UnitDelay3 = rtDW->Switch2_e; - /* Sum: '/Sum2' incorporates: - * Constant: '/vec_hallToPos' - * Selector: '/Selector' - * UnitDelay: '/UnitDelay2' + /* Sum: '/Sum2' incorporates: + * Constant: '/vec_hallToPos' + * Selector: '/Selector' + * UnitDelay: '/UnitDelay2' */ rtb_Sum2_h = (int8_T)(rtConstP.vec_hallToPos_Value[rtb_Sum] - rtDW->UnitDelay2_DSTATE_b); - /* Switch: '/Switch2' incorporates: - * Constant: '/Constant20' - * Constant: '/Constant23' - * Constant: '/Constant24' - * Constant: '/Constant8' - * Logic: '/Logical Operator3' - * RelationalOperator: '/Relational Operator1' - * RelationalOperator: '/Relational Operator6' + /* Switch: '/Switch2' incorporates: + * Constant: '/Constant20' + * Constant: '/Constant23' + * Constant: '/Constant24' + * Constant: '/Constant8' + * Logic: '/Logical Operator3' + * RelationalOperator: '/Relational Operator1' + * RelationalOperator: '/Relational Operator6' */ if ((rtb_Sum2_h == 1) || (rtb_Sum2_h == -5)) { - rtDW->Switch2 = 1; + rtDW->Switch2_e = 1; } else { - rtDW->Switch2 = -1; + rtDW->Switch2_e = -1; } - /* End of Switch: '/Switch2' */ + /* End of Switch: '/Switch2' */ - /* Update for UnitDelay: '/UnitDelay2' incorporates: - * Constant: '/vec_hallToPos' - * Selector: '/Selector' + /* Update for UnitDelay: '/UnitDelay2' incorporates: + * Constant: '/vec_hallToPos' + * Selector: '/Selector' */ rtDW->UnitDelay2_DSTATE_b = rtConstP.vec_hallToPos_Value[rtb_Sum]; /* End of Outputs for SubSystem: '/F01_03_Direction_Detection' */ - /* Outputs for IfAction SubSystem: '/Raw_Motor_Speed_Estimation' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/Raw_Motor_Speed_Estimation' incorporates: + * ActionPort: '/Action Port' */ rtDW->z_counterRawPrev = rtDW->UnitDelay3_DSTATE; - /* Sum: '/Sum7' incorporates: - * Inport: '/z_counterRawPrev' - * UnitDelay: '/UnitDelay3' - * UnitDelay: '/UnitDelay4' + /* Sum: '/Sum7' incorporates: + * Inport: '/z_counterRawPrev' + * UnitDelay: '/UnitDelay3' + * UnitDelay: '/UnitDelay4' */ rtb_Switch2_k = (int16_T)(rtDW->z_counterRawPrev - rtDW->UnitDelay4_DSTATE); - /* Abs: '/Abs2' */ + /* Abs: '/Abs2' */ if (rtb_Switch2_k < 0) { rtb_Switch1_l = (int16_T)-rtb_Switch2_k; } else { rtb_Switch1_l = rtb_Switch2_k; } - /* End of Abs: '/Abs2' */ + /* End of Abs: '/Abs2' */ - /* Relay: '/dz_cntTrnsDet' */ + /* Relay: '/dz_cntTrnsDet' */ if (rtb_Switch1_l >= rtP->dz_cntTrnsDetHi) { rtDW->dz_cntTrnsDet_Mode = true; } else { @@ -920,92 +767,92 @@ void BLDC_controller_step(RT_MODEL *const rtM) rtDW->dz_cntTrnsDet = rtDW->dz_cntTrnsDet_Mode; - /* End of Relay: '/dz_cntTrnsDet' */ + /* End of Relay: '/dz_cntTrnsDet' */ - /* RelationalOperator: '/Relational Operator4' */ - rtb_RelationalOperator4_d = (rtDW->Switch2 != UnitDelay3); + /* RelationalOperator: '/Relational Operator4' */ + rtb_RelationalOperator4_d = (rtDW->Switch2_e != UnitDelay3); - /* Switch: '/Switch3' incorporates: - * Constant: '/Constant4' - * Logic: '/Logical Operator1' - * Switch: '/Switch1' - * Switch: '/Switch2' - * UnitDelay: '/UnitDelay1' + /* Switch: '/Switch3' incorporates: + * Constant: '/Constant4' + * Logic: '/Logical Operator1' + * Switch: '/Switch1' + * Switch: '/Switch2' + * UnitDelay: '/UnitDelay1' */ if (rtb_RelationalOperator4_d && rtDW->UnitDelay1_DSTATE_n) { rtb_Switch1_l = 0; } else if (rtb_RelationalOperator4_d) { - /* Switch: '/Switch2' incorporates: - * UnitDelay: '/UnitDelay4' + /* Switch: '/Switch2' incorporates: + * UnitDelay: '/UnitDelay4' */ rtb_Switch1_l = rtDW->UnitDelay4_DSTATE_e; } else if (rtDW->dz_cntTrnsDet) { - /* Switch: '/Switch1' incorporates: - * Constant: '/cf_speedCoef' - * Product: '/Divide14' - * Switch: '/Switch2' + /* Switch: '/Switch1' incorporates: + * Constant: '/cf_speedCoef' + * Product: '/Divide14' + * Switch: '/Switch2' */ rtb_Switch1_l = (int16_T)((rtP->cf_speedCoef << 4) / rtDW->z_counterRawPrev); } else { - /* Switch: '/Switch1' incorporates: - * Constant: '/cf_speedCoef' - * Gain: '/g_Ha' - * Product: '/Divide13' - * Sum: '/Sum13' - * Switch: '/Switch2' - * UnitDelay: '/UnitDelay2' - * UnitDelay: '/UnitDelay3' - * UnitDelay: '/UnitDelay5' + /* Switch: '/Switch1' incorporates: + * Constant: '/cf_speedCoef' + * Gain: '/g_Ha' + * Product: '/Divide13' + * Sum: '/Sum13' + * Switch: '/Switch2' + * UnitDelay: '/UnitDelay2' + * UnitDelay: '/UnitDelay3' + * UnitDelay: '/UnitDelay5' */ rtb_Switch1_l = (int16_T)(((uint16_T)(rtP->cf_speedCoef << 2) << 4) / (int16_T)(((rtDW->UnitDelay2_DSTATE + rtDW->UnitDelay3_DSTATE_o) + rtDW->UnitDelay5_DSTATE) + rtDW->z_counterRawPrev)); } - /* End of Switch: '/Switch3' */ + /* End of Switch: '/Switch3' */ - /* Product: '/Divide11' */ - rtDW->Divide11 = (int16_T)(rtb_Switch1_l * rtDW->Switch2); + /* Product: '/Divide11' */ + rtDW->Divide11 = (int16_T)(rtb_Switch1_l * rtDW->Switch2_e); - /* Update for UnitDelay: '/UnitDelay4' */ + /* Update for UnitDelay: '/UnitDelay4' */ rtDW->UnitDelay4_DSTATE = rtDW->z_counterRawPrev; - /* Update for UnitDelay: '/UnitDelay2' incorporates: - * UnitDelay: '/UnitDelay3' + /* Update for UnitDelay: '/UnitDelay2' incorporates: + * UnitDelay: '/UnitDelay3' */ rtDW->UnitDelay2_DSTATE = rtDW->UnitDelay3_DSTATE_o; - /* Update for UnitDelay: '/UnitDelay3' incorporates: - * UnitDelay: '/UnitDelay5' + /* Update for UnitDelay: '/UnitDelay3' incorporates: + * UnitDelay: '/UnitDelay5' */ rtDW->UnitDelay3_DSTATE_o = rtDW->UnitDelay5_DSTATE; - /* Update for UnitDelay: '/UnitDelay5' */ + /* Update for UnitDelay: '/UnitDelay5' */ rtDW->UnitDelay5_DSTATE = rtDW->z_counterRawPrev; - /* Update for UnitDelay: '/UnitDelay1' */ + /* Update for UnitDelay: '/UnitDelay1' */ rtDW->UnitDelay1_DSTATE_n = rtb_RelationalOperator4_d; - /* End of Outputs for SubSystem: '/Raw_Motor_Speed_Estimation' */ + /* End of Outputs for SubSystem: '/Raw_Motor_Speed_Estimation' */ } - /* End of If: '/If2' */ + /* End of If: '/If2' */ - /* Outputs for Atomic SubSystem: '/Counter' */ + /* Outputs for Atomic SubSystem: '/Counter' */ - /* Constant: '/Constant6' incorporates: - * Constant: '/z_maxCntRst2' + /* Constant: '/Constant6' incorporates: + * Constant: '/z_maxCntRst2' */ rtb_Switch1_l = (int16_T) Counter(1, rtP->z_maxCntRst, rtb_LogicalOperator, &rtDW->Counter_e); - /* End of Outputs for SubSystem: '/Counter' */ + /* End of Outputs for SubSystem: '/Counter' */ - /* Switch: '/Switch2' incorporates: - * Constant: '/Constant4' - * Constant: '/z_maxCntRst' - * RelationalOperator: '/Relational Operator2' + /* Switch: '/Switch2' incorporates: + * Constant: '/Constant4' + * Constant: '/z_maxCntRst' + * RelationalOperator: '/Relational Operator2' */ if (rtb_Switch1_l > rtP->z_maxCntRst) { rtb_Switch2_k = 0; @@ -1013,18 +860,18 @@ void BLDC_controller_step(RT_MODEL *const rtM) rtb_Switch2_k = rtDW->Divide11; } - /* End of Switch: '/Switch2' */ + /* End of Switch: '/Switch2' */ - /* Abs: '/Abs5' */ + /* Abs: '/Abs5' */ if (rtb_Switch2_k < 0) { rtb_Abs5 = (int16_T)-rtb_Switch2_k; } else { rtb_Abs5 = rtb_Switch2_k; } - /* End of Abs: '/Abs5' */ + /* End of Abs: '/Abs5' */ - /* Relay: '/n_commDeacv' */ + /* Relay: '/n_commDeacv' */ if (rtb_Abs5 >= rtP->n_commDeacvHi) { rtDW->n_commDeacv_Mode = true; } else { @@ -1033,56 +880,56 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Logic: '/Logical Operator2' incorporates: - * Logic: '/Logical Operator1' - * Relay: '/n_commDeacv' + /* Logic: '/Logical Operator2' incorporates: + * Logic: '/Logical Operator1' + * Relay: '/n_commDeacv' */ rtb_LogicalOperator = (rtDW->n_commDeacv_Mode && (!rtDW->dz_cntTrnsDet)); - /* Switch: '/Switch2' incorporates: - * Constant: '/Constant16' - * Product: '/Divide1' - * Product: '/Divide3' - * RelationalOperator: '/Relational Operator7' - * Sum: '/Sum3' - * Switch: '/Switch3' + /* Switch: '/Switch2' incorporates: + * Constant: '/Constant16' + * Product: '/Divide1' + * Product: '/Divide3' + * RelationalOperator: '/Relational Operator7' + * Sum: '/Sum3' + * Switch: '/Switch3' */ if (rtb_LogicalOperator) { - /* MinMax: '/MinMax' */ + /* MinMax: '/MinMax' */ rtb_Switch2_fl = rtb_Switch1_l; if (!(rtb_Switch2_fl < rtDW->z_counterRawPrev)) { rtb_Switch2_fl = rtDW->z_counterRawPrev; } - /* End of MinMax: '/MinMax' */ + /* End of MinMax: '/MinMax' */ - /* Switch: '/Switch3' incorporates: - * Constant: '/Constant16' - * Constant: '/vec_hallToPos' - * RelationalOperator: '/Relational Operator7' - * Selector: '/Selector' - * Sum: '/Sum1' + /* Switch: '/Switch3' incorporates: + * Constant: '/vec_hallToPos' + * Constant: '/Constant16' + * RelationalOperator: '/Relational Operator7' + * Selector: '/Selector' + * Sum: '/Sum1' */ - if (rtDW->Switch2 == 1) { + if (rtDW->Switch2_e == 1) { rtb_Sum2_h = rtConstP.vec_hallToPos_Value[rtb_Sum]; } else { rtb_Sum2_h = (int8_T)(rtConstP.vec_hallToPos_Value[rtb_Sum] + 1); } rtb_Switch2_fl = (int16_T)(((int16_T)((int16_T)((rtb_Switch2_fl << 14) / - rtDW->z_counterRawPrev) * rtDW->Switch2) + (rtb_Sum2_h << 14)) >> 2); + rtDW->z_counterRawPrev) * rtDW->Switch2_e) + (rtb_Sum2_h << 14)) >> 2); } else { - if (rtDW->Switch2 == 1) { - /* Switch: '/Switch3' incorporates: - * Constant: '/vec_hallToPos' - * Selector: '/Selector' + if (rtDW->Switch2_e == 1) { + /* Switch: '/Switch3' incorporates: + * Constant: '/vec_hallToPos' + * Selector: '/Selector' */ rtb_Sum2_h = rtConstP.vec_hallToPos_Value[rtb_Sum]; } else { - /* Switch: '/Switch3' incorporates: - * Constant: '/vec_hallToPos' - * Selector: '/Selector' - * Sum: '/Sum1' + /* Switch: '/Switch3' incorporates: + * Constant: '/vec_hallToPos' + * Selector: '/Selector' + * Sum: '/Sum1' */ rtb_Sum2_h = (int8_T)(rtConstP.vec_hallToPos_Value[rtb_Sum] + 1); } @@ -1090,80 +937,49 @@ void BLDC_controller_step(RT_MODEL *const rtM) rtb_Switch2_fl = (int16_T)(rtb_Sum2_h << 12); } - /* End of Switch: '/Switch2' */ + /* End of Switch: '/Switch2' */ - /* MinMax: '/MinMax1' incorporates: - * Constant: '/Constant1' + /* MinMax: '/MinMax1' incorporates: + * Constant: '/Constant1' */ if (!(rtb_Switch2_fl > 0)) { rtb_Switch2_fl = 0; } - /* End of MinMax: '/MinMax1' */ + /* End of MinMax: '/MinMax1' */ - /* Product: '/Divide2' */ + /* Product: '/Divide2' */ rtb_Switch2_fl = (int16_T)((15 * rtb_Switch2_fl) >> 4); - /* RelationalOperator: '/Relational Operator9' incorporates: - * Constant: '/n_stdStillDet' + /* DataTypeConversion: '/Data Type Conversion2' incorporates: + * Inport: '/r_inpTgt' */ - rtb_RelationalOperator4_d = (rtb_Abs5 < rtP->n_stdStillDet); + if (rtU->r_inpTgt > 2047) { + rtb_DataTypeConversion2 = MAX_int16_T; + } else if (rtU->r_inpTgt <= -2048) { + rtb_DataTypeConversion2 = MIN_int16_T; + } else { + rtb_DataTypeConversion2 = (int16_T)(rtU->r_inpTgt << 4); + } + + /* UnitDelay: '/UnitDelay2' */ + rtb_RelationalOperator4_d = rtDW->UnitDelay2_DSTATE_g; + + /* RelationalOperator: '/Relational Operator9' incorporates: + * Constant: '/n_stdStillDet' + */ + rtb_RelationalOperator9 = (rtb_Abs5 < rtP->n_stdStillDet); /* If: '/If2' incorporates: * Constant: '/b_diagEna' * Constant: '/CTRL_COMM2' * Constant: '/t_errDequal' * Constant: '/t_errQual' + * Logic: '/Logical Operator2' * RelationalOperator: '/Relational Operator2' + * UnitDelay: '/UnitDelay2' */ - rtb_Sum2_h = rtDW->If2_ActiveSubsystem; - UnitDelay3 = -1; - if (rtP->b_diagEna) { - UnitDelay3 = 0; - } - - rtDW->If2_ActiveSubsystem = UnitDelay3; - if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { - /* Disable for Outport: '/z_errCode' incorporates: - * Outport: '/z_errCode ' - */ - rtY->z_errCode = 0U; - - /* Disable for Outport: '/b_errFlag' */ - rtDW->Merge_n = false; - } - - if (UnitDelay3 == 0) { - if (0 != rtb_Sum2_h) { - /* InitializeConditions for IfAction SubSystem: '/F02_Diagnostics' incorporates: - * ActionPort: '/Action Port' - */ - /* InitializeConditions for If: '/If2' incorporates: - * UnitDelay: '/UnitDelay' - */ - rtDW->UnitDelay_DSTATE_c = 0U; - - /* End of InitializeConditions for SubSystem: '/F02_Diagnostics' */ - - /* SystemReset for IfAction SubSystem: '/F02_Diagnostics' incorporates: - * ActionPort: '/Action Port' - */ - - /* SystemReset for Atomic SubSystem: '/Debounce_Filter' */ - - /* SystemReset for If: '/If2' */ - Debounce_Filter_Reset(&rtDW->Debounce_Filter_f); - - /* End of SystemReset for SubSystem: '/Debounce_Filter' */ - - /* SystemReset for Atomic SubSystem: '/either_edge' */ - either_edge_Reset(&rtDW->either_edge_a); - - /* End of SystemReset for SubSystem: '/either_edge' */ - - /* End of SystemReset for SubSystem: '/F02_Diagnostics' */ - } - + if (rtP->b_diagEna && rtDW->UnitDelay2_DSTATE_g) { /* Outputs for IfAction SubSystem: '/F02_Diagnostics' incorporates: * ActionPort: '/Action Port' */ @@ -1175,25 +991,25 @@ void BLDC_controller_step(RT_MODEL *const rtM) * RelationalOperator: '/Relational Operator7' * S-Function (sfix_bitop): '/Bitwise Operator1' * UnitDelay: '/UnitDelay' - * UnitDelay: '/UnitDelay4' + * UnitDelay: '/UnitDelay4' */ - if ((rtDW->UnitDelay_DSTATE_c & 4) != 0) { + if ((rtY->z_errCode & 4) != 0) { rtb_RelationalOperator1_m = true; } else { if (rtDW->UnitDelay4_DSTATE_eu < 0) { /* Abs: '/Abs4' incorporates: - * UnitDelay: '/UnitDelay4' + * UnitDelay: '/UnitDelay4' */ - rtb_toNegative = (int16_T)-rtDW->UnitDelay4_DSTATE_eu; + rtb_Merge_f_idx_1 = (int16_T)-rtDW->UnitDelay4_DSTATE_eu; } else { /* Abs: '/Abs4' incorporates: - * UnitDelay: '/UnitDelay4' + * UnitDelay: '/UnitDelay4' */ - rtb_toNegative = rtDW->UnitDelay4_DSTATE_eu; + rtb_Merge_f_idx_1 = rtDW->UnitDelay4_DSTATE_eu; } - rtb_RelationalOperator1_m = ((rtb_toNegative > rtP->r_errInpTgtThres) && - rtb_RelationalOperator4_d); + rtb_RelationalOperator1_m = ((rtb_Merge_f_idx_1 > rtP->r_errInpTgtThres) && + rtb_RelationalOperator9); } /* End of Switch: '/Switch3' */ @@ -1230,319 +1046,329 @@ void BLDC_controller_step(RT_MODEL *const rtM) if (rtb_RelationalOperator1_m) { /* Outport: '/z_errCode' */ rtY->z_errCode = rtb_Sum_l; - } else { - /* Outport: '/z_errCode' incorporates: - * UnitDelay: '/UnitDelay' - */ - rtY->z_errCode = rtDW->UnitDelay_DSTATE_c; } /* End of Switch: '/Switch1' */ - - /* Update for UnitDelay: '/UnitDelay' incorporates: - * Outport: '/z_errCode' - */ - rtDW->UnitDelay_DSTATE_c = rtY->z_errCode; - /* End of Outputs for SubSystem: '/F02_Diagnostics' */ } /* End of If: '/If2' */ - /* Logic: '/Logical Operator4' incorporates: - * Constant: '/constant2' - * Constant: '/constant8' - * Inport: '/b_motEna' - * Inport: '/z_ctrlModReq' - * Logic: '/Logical Operator1' - * Logic: '/Logical Operator7' - * RelationalOperator: '/Relational Operator10' - * RelationalOperator: '/Relational Operator11' - * RelationalOperator: '/Relational Operator2' - * UnitDelay: '/UnitDelay1' + /* If: '/If4' incorporates: + * UnitDelay: '/UnitDelay2' */ - rtb_RelationalOperator1_m = ((!rtU->b_motEna) || rtDW->Merge_n || - (rtU->z_ctrlModReq == 0) || ((rtU->z_ctrlModReq != rtDW->UnitDelay1_DSTATE_p) - && (rtDW->UnitDelay1_DSTATE_p != 0))); - - /* Chart: '/F03_02_Control_Mode_Manager' incorporates: - * Constant: '/constant' - * Constant: '/constant1' - * Constant: '/constant5' - * Constant: '/constant6' - * Constant: '/constant7' - * Inport: '/z_ctrlModReq' - * Logic: '/Logical Operator3' - * Logic: '/Logical Operator6' - * Logic: '/Logical Operator9' - * RelationalOperator: '/Relational Operator1' - * RelationalOperator: '/Relational Operator3' - * RelationalOperator: '/Relational Operator4' - * RelationalOperator: '/Relational Operator5' - * RelationalOperator: '/Relational Operator6' - */ - if (rtDW->is_active_c1_BLDC_controller == 0U) { - rtDW->is_active_c1_BLDC_controller = 1U; - rtDW->is_c1_BLDC_controller = IN_OPEN; - rtb_Sum_l = OPEN_MODE; - } else if (rtDW->is_c1_BLDC_controller == IN_ACTIVE) { - if (rtb_RelationalOperator1_m) { - rtDW->is_ACTIVE = IN_NO_ACTIVE_CHILD; - rtDW->is_c1_BLDC_controller = IN_OPEN; - rtb_Sum_l = OPEN_MODE; - } else { - switch (rtDW->is_ACTIVE) { - case IN_SPEED_MODE: - rtb_Sum_l = SPD_MODE; - break; - - case IN_TORQUE_MODE: - rtb_Sum_l = TRQ_MODE; - break; - - default: - rtb_Sum_l = VLT_MODE; - break; - } - } - } else { - rtb_Sum_l = OPEN_MODE; - if ((!rtb_RelationalOperator1_m) && ((rtU->z_ctrlModReq == 1) || - (rtU->z_ctrlModReq == 2) || (rtU->z_ctrlModReq == 3)) && - rtb_RelationalOperator4_d) { - rtDW->is_c1_BLDC_controller = IN_ACTIVE; - if (rtU->z_ctrlModReq == 3) { - rtDW->is_ACTIVE = IN_TORQUE_MODE; - rtb_Sum_l = TRQ_MODE; - } else if (rtU->z_ctrlModReq == 2) { - rtDW->is_ACTIVE = IN_SPEED_MODE; - rtb_Sum_l = SPD_MODE; - } else { - rtDW->is_ACTIVE = IN_VOLTAGE_MODE; - rtb_Sum_l = VLT_MODE; - } - } + rtb_Sum2_h = rtDW->If4_ActiveSubsystem; + UnitDelay3 = -1; + if (rtDW->UnitDelay2_DSTATE_g) { + UnitDelay3 = 0; } - /* End of Chart: '/F03_02_Control_Mode_Manager' */ + rtDW->If4_ActiveSubsystem = UnitDelay3; + if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { + /* Disable for If: '/If2' */ + rtDW->If2_ActiveSubsystem = -1; + } - /* Saturate: '/Saturation2' incorporates: - * Inport: '/r_inpTgt' - */ - rtb_Gain3 = rtU->r_inpTgt << 4; - - /* If: '/If1' incorporates: - * Constant: '/z_ctrlTypSel1' - * Inport: '/r_inpTgt' - * Inport: '/r_inpTgt' - * Saturate: '/Saturation2' - */ - if (rtP->z_ctrlTypSel == 2) { - /* Outputs for IfAction SubSystem: '/FOC_Control_Type' incorporates: - * ActionPort: '/Action Port' + if (UnitDelay3 == 0) { + /* Outputs for IfAction SubSystem: '/F03_Control_Mode_Manager' incorporates: + * ActionPort: '/Action Port' */ - /* SignalConversion: '/TmpSignal ConversionAtSelectorInport1' incorporates: - * Constant: '/Vd_max' - * Constant: '/constant1' - * Constant: '/i_max' - * Constant: '/n_max' - */ - tmp[0] = 0; - tmp[1] = rtP->Vd_max; - tmp[2] = rtP->n_max; - tmp[3] = rtP->i_max; - - /* End of Outputs for SubSystem: '/FOC_Control_Type' */ - - /* Saturate: '/Saturation2' incorporates: - * Inport: '/r_inpTgt' - */ - if (rtb_Gain3 >= 16000) { - rtb_toNegative = 16000; - } else if (rtb_Gain3 <= -16000) { - rtb_toNegative = -16000; - } else { - rtb_toNegative = (int16_T)(rtU->r_inpTgt << 4); - } - - /* Outputs for IfAction SubSystem: '/FOC_Control_Type' incorporates: - * ActionPort: '/Action Port' - */ - /* Product: '/Divide1' incorporates: + /* Logic: '/Logical Operator4' incorporates: + * Constant: '/constant2' + * Constant: '/constant8' + * Inport: '/b_motEna' * Inport: '/z_ctrlModReq' - * Product: '/Divide4' - * Selector: '/Selector' + * Logic: '/Logical Operator1' + * Logic: '/Logical Operator7' + * RelationalOperator: '/Relational Operator10' + * RelationalOperator: '/Relational Operator11' + * RelationalOperator: '/Relational Operator2' + * UnitDelay: '/UnitDelay1' */ - rtb_Merge = (int16_T)(((uint16_T)((tmp[rtU->z_ctrlModReq] << 5) / 125) * - rtb_toNegative) >> 12); + rtb_RelationalOperator1_m = ((!rtU->b_motEna) || rtDW->Merge_n || + (rtU->z_ctrlModReq == 0) || ((rtU->z_ctrlModReq != rtDW->z_ctrlMod) && + (rtDW->z_ctrlMod != 0))); - /* End of Outputs for SubSystem: '/FOC_Control_Type' */ - } else if (rtb_Gain3 >= 16000) { - /* Outputs for IfAction SubSystem: '/Default_Control_Type' incorporates: - * ActionPort: '/Action Port' + /* Chart: '/F03_02_Control_Mode_Manager' incorporates: + * Constant: '/constant' + * Constant: '/constant1' + * Constant: '/constant5' + * Constant: '/constant6' + * Constant: '/constant7' + * Inport: '/z_ctrlModReq' + * Logic: '/Logical Operator3' + * Logic: '/Logical Operator6' + * Logic: '/Logical Operator9' + * RelationalOperator: '/Relational Operator1' + * RelationalOperator: '/Relational Operator3' + * RelationalOperator: '/Relational Operator4' + * RelationalOperator: '/Relational Operator5' + * RelationalOperator: '/Relational Operator6' */ - /* Saturate: '/Saturation2' incorporates: - * Inport: '/r_inpTgt' - */ - rtb_Merge = 16000; + if (rtDW->is_active_c1_BLDC_controller == 0U) { + rtDW->is_active_c1_BLDC_controller = 1U; + rtDW->is_c1_BLDC_controller = IN_OPEN; + rtDW->z_ctrlMod = OPEN_MODE; + } else if (rtDW->is_c1_BLDC_controller == IN_ACTIVE) { + if (rtb_RelationalOperator1_m) { + rtDW->is_ACTIVE = IN_NO_ACTIVE_CHILD; + rtDW->is_c1_BLDC_controller = IN_OPEN; + rtDW->z_ctrlMod = OPEN_MODE; + } else { + switch (rtDW->is_ACTIVE) { + case IN_SPEED_MODE: + rtDW->z_ctrlMod = SPD_MODE; + break; - /* End of Outputs for SubSystem: '/Default_Control_Type' */ - } else if (rtb_Gain3 <= -16000) { - /* Outputs for IfAction SubSystem: '/Default_Control_Type' incorporates: - * ActionPort: '/Action Port' - */ - /* Saturate: '/Saturation2' incorporates: - * Inport: '/r_inpTgt' - */ - rtb_Merge = -16000; + case IN_TORQUE_MODE: + rtDW->z_ctrlMod = TRQ_MODE; + break; - /* End of Outputs for SubSystem: '/Default_Control_Type' */ - } else { - /* Outputs for IfAction SubSystem: '/Default_Control_Type' incorporates: - * ActionPort: '/Action Port' - */ - rtb_Merge = (int16_T)(rtU->r_inpTgt << 4); - - /* End of Outputs for SubSystem: '/Default_Control_Type' */ - } - - /* End of If: '/If1' */ - - /* If: '/If2' incorporates: - * Inport: '/r_inpTgtScaRaw' - */ - rtb_Sum2_h = rtDW->If2_ActiveSubsystem_j; - UnitDelay3 = (int8_T)!(rtb_Sum_l == 0); - rtDW->If2_ActiveSubsystem_j = UnitDelay3; - switch (UnitDelay3) { - case 0: - if (UnitDelay3 != rtb_Sum2_h) { - /* SystemReset for IfAction SubSystem: '/Open_Mode' incorporates: - * ActionPort: '/Action Port' - */ - /* SystemReset for Atomic SubSystem: '/rising_edge_init' */ - /* SystemReset for If: '/If2' incorporates: - * UnitDelay: '/UnitDelay' - * UnitDelay: '/UnitDelay' - */ - rtDW->UnitDelay_DSTATE_e = true; - - /* End of SystemReset for SubSystem: '/rising_edge_init' */ - - /* SystemReset for Atomic SubSystem: '/Rate_Limiter' */ - rtDW->UnitDelay_DSTATE = 0; - - /* End of SystemReset for SubSystem: '/Rate_Limiter' */ - /* End of SystemReset for SubSystem: '/Open_Mode' */ + default: + rtDW->z_ctrlMod = VLT_MODE; + break; + } + } + } else { + rtDW->z_ctrlMod = OPEN_MODE; + if ((!rtb_RelationalOperator1_m) && ((rtU->z_ctrlModReq == 1) || + (rtU->z_ctrlModReq == 2) || (rtU->z_ctrlModReq == 3)) && + rtb_RelationalOperator9) { + rtDW->is_c1_BLDC_controller = IN_ACTIVE; + if (rtU->z_ctrlModReq == 3) { + rtDW->is_ACTIVE = IN_TORQUE_MODE; + rtDW->z_ctrlMod = TRQ_MODE; + } else if (rtU->z_ctrlModReq == 2) { + rtDW->is_ACTIVE = IN_SPEED_MODE; + rtDW->z_ctrlMod = SPD_MODE; + } else { + rtDW->is_ACTIVE = IN_VOLTAGE_MODE; + rtDW->z_ctrlMod = VLT_MODE; + } + } } - /* Outputs for IfAction SubSystem: '/Open_Mode' incorporates: - * ActionPort: '/Action Port' - */ - /* DataTypeConversion: '/Data Type Conversion' incorporates: - * UnitDelay: '/UnitDelay4' - */ - rtb_Gain3 = rtDW->UnitDelay4_DSTATE_eu << 12; - rtb_DataTypeConversion = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | - -134217728 : rtb_Gain3 & 134217727; + /* End of Chart: '/F03_02_Control_Mode_Manager' */ - /* Outputs for Atomic SubSystem: '/rising_edge_init' */ - /* UnitDelay: '/UnitDelay' */ - rtb_RelationalOperator4_d = rtDW->UnitDelay_DSTATE_e; - - /* Update for UnitDelay: '/UnitDelay' incorporates: - * Constant: '/Constant' + /* If: '/If1' incorporates: + * Constant: '/z_ctrlTypSel1' + * DataTypeConversion: '/Data Type Conversion2' + * Inport: '/r_inpTgt' + * Saturate: '/Saturation' */ - rtDW->UnitDelay_DSTATE_e = false; + if (rtP->z_ctrlTypSel == 2) { + /* Outputs for IfAction SubSystem: '/FOC_Control_Type' incorporates: + * ActionPort: '/Action Port' + */ + /* SignalConversion: '/TmpSignal ConversionAtSelectorInport1' incorporates: + * Constant: '/Vd_max' + * Constant: '/constant1' + * Constant: '/i_max' + * Constant: '/n_max' + */ + tmp[0] = 0; + tmp[1] = rtP->Vd_max; + tmp[2] = rtP->n_max; + tmp[3] = rtP->i_max; - /* End of Outputs for SubSystem: '/rising_edge_init' */ + /* End of Outputs for SubSystem: '/FOC_Control_Type' */ - /* Outputs for Atomic SubSystem: '/Rate_Limiter' */ - /* Switch: '/Switch1' incorporates: - * UnitDelay: '/UnitDelay' - */ - if (rtb_RelationalOperator4_d) { - rtb_Switch1 = rtb_DataTypeConversion; + /* Saturate: '/Saturation' incorporates: + * DataTypeConversion: '/Data Type Conversion2' + */ + if (rtb_DataTypeConversion2 > 16000) { + rtb_Merge = 16000; + } else if (rtb_DataTypeConversion2 < -16000) { + rtb_Merge = -16000; + } else { + rtb_Merge = rtb_DataTypeConversion2; + } + + /* Outputs for IfAction SubSystem: '/FOC_Control_Type' incorporates: + * ActionPort: '/Action Port' + */ + /* Product: '/Divide1' incorporates: + * Inport: '/z_ctrlModReq' + * Product: '/Divide4' + * Selector: '/Selector' + */ + rtb_Merge = (int16_T)(((uint16_T)((tmp[rtU->z_ctrlModReq] << 5) / 125) * + rtb_Merge) >> 12); + + /* End of Outputs for SubSystem: '/FOC_Control_Type' */ + } else if (rtb_DataTypeConversion2 > 16000) { + /* Outputs for IfAction SubSystem: '/Default_Control_Type' incorporates: + * ActionPort: '/Action Port' + */ + /* Saturate: '/Saturation' incorporates: + * Inport: '/r_inpTgt' + */ + rtb_Merge = 16000; + + /* End of Outputs for SubSystem: '/Default_Control_Type' */ + } else if (rtb_DataTypeConversion2 < -16000) { + /* Outputs for IfAction SubSystem: '/Default_Control_Type' incorporates: + * ActionPort: '/Action Port' + */ + /* Saturate: '/Saturation' incorporates: + * Inport: '/r_inpTgt' + */ + rtb_Merge = -16000; + + /* End of Outputs for SubSystem: '/Default_Control_Type' */ } else { - rtb_Switch1 = rtDW->UnitDelay_DSTATE; + /* Outputs for IfAction SubSystem: '/Default_Control_Type' incorporates: + * ActionPort: '/Action Port' + */ + rtb_Merge = rtb_DataTypeConversion2; + + /* End of Outputs for SubSystem: '/Default_Control_Type' */ } - /* End of Switch: '/Switch1' */ + /* End of If: '/If1' */ - /* Sum: '/Sum1' */ - rtb_Gain3 = -rtb_Switch1; - rtb_Sum1 = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | -134217728 : rtb_Gain3 - & 134217727; - - /* Switch: '/Switch2' incorporates: - * Constant: '/dV_openRate' - * RelationalOperator: '/LowerRelop1' + /* If: '/If2' incorporates: + * Inport: '/r_inpTgtScaRaw' */ - if (rtb_Sum1 > rtP->dV_openRate) { - rtb_Sum1 = rtP->dV_openRate; - } else { - /* Gain: '/Gain3' */ - rtb_Gain3 = -rtP->dV_openRate; - rtb_Gain3 = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | -134217728 : + rtb_Sum2_h = rtDW->If2_ActiveSubsystem; + UnitDelay3 = (int8_T)!(rtDW->z_ctrlMod == 0); + rtDW->If2_ActiveSubsystem = UnitDelay3; + switch (UnitDelay3) { + case 0: + if (UnitDelay3 != rtb_Sum2_h) { + /* SystemReset for IfAction SubSystem: '/Open_Mode' incorporates: + * ActionPort: '/Action Port' + */ + /* SystemReset for Atomic SubSystem: '/rising_edge_init' */ + /* SystemReset for If: '/If2' incorporates: + * UnitDelay: '/UnitDelay' + * UnitDelay: '/UnitDelay' + */ + rtDW->UnitDelay_DSTATE_e = true; + + /* End of SystemReset for SubSystem: '/rising_edge_init' */ + + /* SystemReset for Atomic SubSystem: '/Rate_Limiter' */ + rtDW->UnitDelay_DSTATE = 0; + + /* End of SystemReset for SubSystem: '/Rate_Limiter' */ + /* End of SystemReset for SubSystem: '/Open_Mode' */ + } + + /* Outputs for IfAction SubSystem: '/Open_Mode' incorporates: + * ActionPort: '/Action Port' + */ + /* DataTypeConversion: '/Data Type Conversion' incorporates: + * UnitDelay: '/UnitDelay4' + */ + rtb_Gain3 = rtDW->UnitDelay4_DSTATE_eu << 12; + rtb_DataTypeConversion = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | + -134217728 : rtb_Gain3 & 134217727; + + /* Outputs for Atomic SubSystem: '/rising_edge_init' */ + /* UnitDelay: '/UnitDelay' */ + rtb_RelationalOperator9 = rtDW->UnitDelay_DSTATE_e; + + /* Update for UnitDelay: '/UnitDelay' incorporates: + * Constant: '/Constant' + */ + rtDW->UnitDelay_DSTATE_e = false; + + /* End of Outputs for SubSystem: '/rising_edge_init' */ + + /* Outputs for Atomic SubSystem: '/Rate_Limiter' */ + /* Switch: '/Switch1' incorporates: + * UnitDelay: '/UnitDelay' + */ + if (rtb_RelationalOperator9) { + rtb_Switch1 = rtb_DataTypeConversion; + } else { + rtb_Switch1 = rtDW->UnitDelay_DSTATE; + } + + /* End of Switch: '/Switch1' */ + + /* Sum: '/Sum1' */ + rtb_Gain3 = -rtb_Switch1; + rtb_Sum1 = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | -134217728 : rtb_Gain3 & 134217727; - /* Switch: '/Switch' incorporates: - * RelationalOperator: '/UpperRelop' + /* Switch: '/Switch2' incorporates: + * Constant: '/dV_openRate' + * RelationalOperator: '/LowerRelop1' */ - if (rtb_Sum1 < rtb_Gain3) { - rtb_Sum1 = rtb_Gain3; + if (rtb_Sum1 > rtP->dV_openRate) { + rtb_Sum1 = rtP->dV_openRate; + } else { + /* Gain: '/Gain3' */ + rtb_Gain3 = -rtP->dV_openRate; + rtb_Gain3 = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | -134217728 : + rtb_Gain3 & 134217727; + + /* Switch: '/Switch' incorporates: + * RelationalOperator: '/UpperRelop' + */ + if (rtb_Sum1 < rtb_Gain3) { + rtb_Sum1 = rtb_Gain3; + } + + /* End of Switch: '/Switch' */ } - /* End of Switch: '/Switch' */ + /* End of Switch: '/Switch2' */ + + /* Sum: '/Sum2' */ + rtb_Gain3 = rtb_Sum1 + rtb_Switch1; + rtb_Switch1 = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | -134217728 : + rtb_Gain3 & 134217727; + + /* Switch: '/Switch2' */ + if (rtb_RelationalOperator9) { + /* Update for UnitDelay: '/UnitDelay' */ + rtDW->UnitDelay_DSTATE = rtb_DataTypeConversion; + } else { + /* Update for UnitDelay: '/UnitDelay' */ + rtDW->UnitDelay_DSTATE = rtb_Switch1; + } + + /* End of Switch: '/Switch2' */ + /* End of Outputs for SubSystem: '/Rate_Limiter' */ + + /* DataTypeConversion: '/Data Type Conversion1' */ + rtDW->Merge1 = (int16_T)(rtb_Switch1 >> 12); + + /* End of Outputs for SubSystem: '/Open_Mode' */ + break; + + case 1: + /* Outputs for IfAction SubSystem: '/Default_Mode' incorporates: + * ActionPort: '/Action Port' + */ + rtDW->Merge1 = rtb_Merge; + + /* End of Outputs for SubSystem: '/Default_Mode' */ + break; } - /* End of Switch: '/Switch2' */ - - /* Sum: '/Sum2' */ - rtb_Gain3 = rtb_Sum1 + rtb_Switch1; - rtb_Switch1 = (rtb_Gain3 & 134217728) != 0 ? rtb_Gain3 | -134217728 : - rtb_Gain3 & 134217727; - - /* Switch: '/Switch2' */ - if (rtb_RelationalOperator4_d) { - /* Update for UnitDelay: '/UnitDelay' */ - rtDW->UnitDelay_DSTATE = rtb_DataTypeConversion; - } else { - /* Update for UnitDelay: '/UnitDelay' */ - rtDW->UnitDelay_DSTATE = rtb_Switch1; - } - - /* End of Switch: '/Switch2' */ - /* End of Outputs for SubSystem: '/Rate_Limiter' */ - - /* DataTypeConversion: '/Data Type Conversion1' */ - rtb_Merge1 = (int16_T)(rtb_Switch1 >> 12); - - /* End of Outputs for SubSystem: '/Open_Mode' */ - break; - - case 1: - /* Outputs for IfAction SubSystem: '/Default_Mode' incorporates: - * ActionPort: '/Action Port' - */ - rtb_Merge1 = rtb_Merge; - - /* End of Outputs for SubSystem: '/Default_Mode' */ - break; + /* End of If: '/If2' */ + /* End of Outputs for SubSystem: '/F03_Control_Mode_Manager' */ } - /* End of If: '/If2' */ + /* End of If: '/If4' */ + + /* UnitDelay: '/UnitDelay5' */ + rtb_RelationalOperator9 = rtDW->UnitDelay5_DSTATE_l; /* Saturate: '/Saturation' incorporates: * Inport: '/i_phaAB' */ rtb_Gain3 = rtU->i_phaAB << 4; - if (rtb_Gain3 >= 32000) { - rtb_Saturation = 32000; - } else if (rtb_Gain3 <= -32000) { - rtb_Saturation = -32000; + if (rtb_Gain3 >= 27200) { + rtb_Merge = 27200; + } else if (rtb_Gain3 <= -27200) { + rtb_Merge = -27200; } else { - rtb_Saturation = (int16_T)(rtU->i_phaAB << 4); + rtb_Merge = (int16_T)(rtU->i_phaAB << 4); } /* End of Saturate: '/Saturation' */ @@ -1551,16 +1377,117 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Inport: '/i_phaBC' */ rtb_Gain3 = rtU->i_phaBC << 4; - if (rtb_Gain3 >= 32000) { - rtb_Merge = 32000; - } else if (rtb_Gain3 <= -32000) { - rtb_Merge = -32000; + if (rtb_Gain3 >= 27200) { + rtb_Saturation1 = 27200; + } else if (rtb_Gain3 <= -27200) { + rtb_Saturation1 = -27200; } else { - rtb_Merge = (int16_T)(rtU->i_phaBC << 4); + rtb_Saturation1 = (int16_T)(rtU->i_phaBC << 4); } /* End of Saturate: '/Saturation1' */ + /* If: '/If3' incorporates: + * Constant: '/CTRL_COMM2' + * Constant: '/b_fieldWeakEna' + * Constant: '/z_ctrlTypSel1' + * Logic: '/Logical Operator1' + * RelationalOperator: '/Relational Operator1' + * UnitDelay: '/UnitDelay5' + */ + if (rtP->b_fieldWeakEna && rtDW->UnitDelay5_DSTATE_l && (rtP->z_ctrlTypSel != + 0)) { + /* Outputs for IfAction SubSystem: '/F04_Field_Weakening' incorporates: + * ActionPort: '/Action Port' + */ + /* Abs: '/Abs5' incorporates: + * DataTypeConversion: '/Data Type Conversion2' + */ + if (rtb_DataTypeConversion2 < 0) { + rtb_DataTypeConversion2 = (int16_T)-rtb_DataTypeConversion2; + } + + /* End of Abs: '/Abs5' */ + + /* Switch: '/Switch2' incorporates: + * Constant: '/r_fieldWeakHi' + * Constant: '/r_fieldWeakLo' + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtb_DataTypeConversion2 > rtP->r_fieldWeakHi) { + rtb_DataTypeConversion2 = rtP->r_fieldWeakHi; + } else { + if (rtb_DataTypeConversion2 < rtP->r_fieldWeakLo) { + /* Switch: '/Switch' incorporates: + * Constant: '/r_fieldWeakLo' + */ + rtb_DataTypeConversion2 = rtP->r_fieldWeakLo; + } + } + + /* End of Switch: '/Switch2' */ + + /* Switch: '/Switch2' incorporates: + * Constant: '/CTRL_COMM2' + * Constant: '/a_phaAdvMax' + * Constant: '/id_fieldWeakMax' + * RelationalOperator: '/Relational Operator1' + */ + if (rtP->z_ctrlTypSel == 2) { + rtb_Merge_f_idx_1 = rtP->id_fieldWeakMax; + } else { + rtb_Merge_f_idx_1 = rtP->a_phaAdvMax; + } + + /* End of Switch: '/Switch2' */ + + /* Switch: '/Switch2' incorporates: + * Constant: '/n_fieldWeakAuthHi' + * Constant: '/n_fieldWeakAuthLo' + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtb_Abs5 > rtP->n_fieldWeakAuthHi) { + rtb_Switch2_l = rtP->n_fieldWeakAuthHi; + } else if (rtb_Abs5 < rtP->n_fieldWeakAuthLo) { + /* Switch: '/Switch' incorporates: + * Constant: '/n_fieldWeakAuthLo' + */ + rtb_Switch2_l = rtP->n_fieldWeakAuthLo; + } else { + rtb_Switch2_l = rtb_Abs5; + } + + /* End of Switch: '/Switch2' */ + + /* Product: '/Divide3' incorporates: + * Constant: '/n_fieldWeakAuthHi' + * Constant: '/n_fieldWeakAuthLo' + * Constant: '/r_fieldWeakHi' + * Constant: '/r_fieldWeakLo' + * Product: '/Divide1' + * Product: '/Divide14' + * Product: '/Divide2' + * Sum: '/Sum1' + * Sum: '/Sum2' + * Sum: '/Sum3' + * Sum: '/Sum4' + */ + rtDW->Divide3 = (int16_T)(((uint16_T)(((uint32_T)(uint16_T)(((int16_T) + (rtb_DataTypeConversion2 - rtP->r_fieldWeakLo) << 15) / (int16_T) + (rtP->r_fieldWeakHi - rtP->r_fieldWeakLo)) * (uint16_T)(((int16_T) + (rtb_Switch2_l - rtP->n_fieldWeakAuthLo) << 15) / (int16_T) + (rtP->n_fieldWeakAuthHi - rtP->n_fieldWeakAuthLo))) >> 15) * + rtb_Merge_f_idx_1) >> 15); + + /* End of Outputs for SubSystem: '/F04_Field_Weakening' */ + } + + /* End of If: '/If3' */ + /* If: '/If1' incorporates: * Constant: '/z_ctrlTypSel1' */ @@ -1572,130 +1499,71 @@ void BLDC_controller_step(RT_MODEL *const rtM) rtDW->If1_ActiveSubsystem = UnitDelay3; if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { - /* Disable for If: '/If2' */ + /* Disable for If: '/If2' */ if (rtDW->If2_ActiveSubsystem_a == 0) { - /* Disable for Outport: '/iq' */ + /* Disable for Outport: '/iq' */ rtDW->Sum1[0] = 0; - /* Disable for Outport: '/id' */ + /* Disable for Outport: '/id' */ rtDW->Sum1[1] = 0; } rtDW->If2_ActiveSubsystem_a = -1; - /* End of Disable for If: '/If2' */ + /* End of Disable for If: '/If2' */ - /* Disable for If: '/If1' */ - if (rtDW->If1_ActiveSubsystem_e == 0) { - /* Disable for Outport: '/Vd' */ - rtDW->Switch1 = 0; - } - - rtDW->If1_ActiveSubsystem_e = -1; - - /* End of Disable for If: '/If1' */ - - /* Disable for If: '/If1' */ - if (rtDW->If1_ActiveSubsystem_f == 0) { - /* Disable for Outport: '/iq_limProt' */ - rtDW->Divide4 = 0; - } - - rtDW->If1_ActiveSubsystem_f = -1; - - /* End of Disable for If: '/If1' */ - - /* Disable for If: '/If2' */ - if (rtDW->If2_ActiveSubsystem_c == 0) { - /* Disable for Outport: '/n_limProt' */ - rtDW->Divide1 = 0; - } - - rtDW->If2_ActiveSubsystem_c = -1; - - /* End of Disable for If: '/If2' */ - - /* Disable for SwitchCase: '/Switch Case' */ - rtDW->SwitchCase_ActiveSubsystem = -1; - - /* Disable for Outport: '/V_phaABC_FOC' */ + /* Disable for Outport: '/V_phaABC_FOC' */ rtDW->Gain4[0] = 0; rtDW->Gain4[1] = 0; rtDW->Gain4[2] = 0; - /* Disable for Outport: '/Vq' */ - rtDW->Merge = 0; - - /* Disable for Outport: '/r_devSignal1' */ + /* Disable for Outport: '/r_devSignal1' */ rtDW->Sum1[0] = 0; - /* Disable for Outport: '/r_devSignal2' */ + /* Disable for Outport: '/r_devSignal2' */ rtDW->Sum1[1] = 0; } if (UnitDelay3 == 0) { - /* Outputs for IfAction SubSystem: '/F04_Field_Oriented_Control' incorporates: - * ActionPort: '/Action Port' - */ - /* Relay: '/n_fieldWeakAuth' */ - if (rtb_Abs5 >= rtP->n_fieldWeakAuthHi) { - rtDW->n_fieldWeakAuth_Mode = true; - } else { - if (rtb_Abs5 <= rtP->n_fieldWeakAuthLo) { - rtDW->n_fieldWeakAuth_Mode = false; - } + if (0 != rtb_Sum2_h) { + /* InitializeConditions for IfAction SubSystem: '/F05_Field_Oriented_Control' incorporates: + * ActionPort: '/Action Port' + */ + /* InitializeConditions for If: '/If1' incorporates: + * UnitDelay: '/UnitDelay4' + */ + rtDW->UnitDelay4_DSTATE_h = 0; + + /* End of InitializeConditions for SubSystem: '/F05_Field_Oriented_Control' */ } - /* Switch: '/Switch1' incorporates: - * Constant: '/a_elecPeriod1' - * Constant: '/b_fieldWeakEna' - * Logic: '/Logical Operator2' - * Relay: '/n_fieldWeakAuth' + /* Outputs for IfAction SubSystem: '/F05_Field_Oriented_Control' incorporates: + * ActionPort: '/Action Port' */ - if (rtP->b_fieldWeakEna && rtDW->n_fieldWeakAuth_Mode) { - /* Abs: '/Abs5' */ - if (rtb_Merge1 < 0) { - rtb_id_fieldWeak_M1 = (int16_T)-rtb_Merge1; - } else { - rtb_id_fieldWeak_M1 = rtb_Merge1; - } - - /* End of Abs: '/Abs5' */ - - /* PreLookup: '/r_fieldWeak_XA' */ - rtb_r_fieldWeak_XA_o1 = plook_u8s16u8n7_evenc_s(rtb_id_fieldWeak_M1, - rtP->r_fieldWeak_XA[0], (uint16_T)(rtP->r_fieldWeak_XA[1] - - rtP->r_fieldWeak_XA[0]), 11U, &rtb_r_fieldWeak_XA_o2); - - /* Interpolation_n-D: '/id_fieldWeak_M1' */ - rtb_id_fieldWeak_M1 = intrp1d_s16s32s32u8u8n7l_s(rtb_r_fieldWeak_XA_o1, - rtb_r_fieldWeak_XA_o2, rtP->id_fieldWeak_M1); + /* Abs: '/Abs1' */ + if (rtDW->Merge1 < 0) { + rtb_Switch2_l = (int16_T)-rtDW->Merge1; } else { - rtb_id_fieldWeak_M1 = 0; + rtb_Switch2_l = rtDW->Merge1; } - /* End of Switch: '/Switch1' */ + /* End of Abs: '/Abs1' */ - /* Gain: '/toNegative' */ - rtb_toNegative = (int16_T)-rtb_id_fieldWeak_M1; + /* Gain: '/toNegative' */ + rtb_toNegative = (int16_T)-rtDW->Divide3; - /* Gain: '/Gain4' incorporates: - * Constant: '/i_max' - */ - rtb_Gain4 = (int16_T)-rtP->i_max; - - /* If: '/If1' incorporates: - * Constant: '/b_selPhaABCurrMeas' + /* If: '/If1' incorporates: + * Constant: '/b_selPhaABCurrMeas' */ if (rtP->b_selPhaABCurrMeas) { - /* Outputs for IfAction SubSystem: '/Clarke_PhasesAB' incorporates: + /* Outputs for IfAction SubSystem: '/Clarke_PhasesAB' incorporates: * ActionPort: '/Action Port' */ /* Gain: '/Gain4' */ - rtb_Gain3 = 18919 * rtb_Saturation; + rtb_Gain3 = 18919 * rtb_Merge; /* Gain: '/Gain2' */ - rtb_DataTypeConversion = 18919 * rtb_Merge; + rtb_DataTypeConversion = 18919 * rtb_Saturation1; /* Sum: '/Sum1' incorporates: * Gain: '/Gain2' @@ -1712,16 +1580,16 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - rtb_Gain2_f = (int16_T)rtb_Gain3; + rtb_DataTypeConversion2 = (int16_T)rtb_Gain3; /* End of Sum: '/Sum1' */ - /* End of Outputs for SubSystem: '/Clarke_PhasesAB' */ + /* End of Outputs for SubSystem: '/Clarke_PhasesAB' */ } else { - /* Outputs for IfAction SubSystem: '/Clarke_PhasesBC' incorporates: + /* Outputs for IfAction SubSystem: '/Clarke_PhasesBC' incorporates: * ActionPort: '/Action Port' */ /* Sum: '/Sum3' */ - rtb_Gain3 = rtb_Saturation - rtb_Merge; + rtb_Gain3 = rtb_Merge - rtb_Saturation1; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -1734,10 +1602,11 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Sum: '/Sum3' */ rtb_Gain3 *= 18919; - rtb_Gain2_f = (int16_T)(((rtb_Gain3 < 0 ? 32767 : 0) + rtb_Gain3) >> 15); + rtb_DataTypeConversion2 = (int16_T)(((rtb_Gain3 < 0 ? 32767 : 0) + + rtb_Gain3) >> 15); /* Sum: '/Sum1' */ - rtb_Gain3 = -rtb_Saturation - rtb_Merge; + rtb_Gain3 = -rtb_Merge - rtb_Saturation1; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -1746,25 +1615,19 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - rtb_Saturation = (int16_T)rtb_Gain3; + rtb_Merge = (int16_T)rtb_Gain3; /* End of Sum: '/Sum1' */ - /* End of Outputs for SubSystem: '/Clarke_PhasesBC' */ + /* End of Outputs for SubSystem: '/Clarke_PhasesBC' */ } - /* End of If: '/If1' */ + /* End of If: '/If1' */ - /* PreLookup: '/a_elecAngle_XA' */ - rtb_r_fieldWeak_XA_o1 = plook_u8s16_evencka(rtb_Switch2_fl, 0, 128U, 180U); + /* PreLookup: '/a_elecAngle_XA' */ + rtb_Sum_l = plook_u8s16_evencka(rtb_Switch2_fl, 0, 128U, 180U); - /* Interpolation_n-D: '/r_sin_M1' */ - rtb_MinMax2 = rtConstP.r_sin_M1_Table[rtb_r_fieldWeak_XA_o1]; - - /* Interpolation_n-D: '/r_cos_M1' */ - rtb_Merge = rtConstP.r_cos_M1_Table[rtb_r_fieldWeak_XA_o1]; - - /* If: '/If2' incorporates: - * Constant: '/cf_currFilt' + /* If: '/If2' incorporates: + * Constant: '/cf_currFilt' * Inport: '/b_motEna' */ rtb_Sum2_h = rtDW->If2_ActiveSubsystem_a; @@ -1775,38 +1638,38 @@ void BLDC_controller_step(RT_MODEL *const rtM) rtDW->If2_ActiveSubsystem_a = UnitDelay3; if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { - /* Disable for Outport: '/iq' */ + /* Disable for Outport: '/iq' */ rtDW->Sum1[0] = 0; - /* Disable for Outport: '/id' */ + /* Disable for Outport: '/id' */ rtDW->Sum1[1] = 0; } if (UnitDelay3 == 0) { if (0 != rtb_Sum2_h) { - /* SystemReset for IfAction SubSystem: '/Current_Filtering' incorporates: - * ActionPort: '/Action Port' + /* SystemReset for IfAction SubSystem: '/Current_Filtering' incorporates: + * ActionPort: '/Action Port' */ - /* SystemReset for Atomic SubSystem: '/Low_Pass_Filter' */ + /* SystemReset for Atomic SubSystem: '/Low_Pass_Filter' */ - /* SystemReset for If: '/If2' */ + /* SystemReset for If: '/If2' */ Low_Pass_Filter_Reset(&rtDW->Low_Pass_Filter_m); - /* End of SystemReset for SubSystem: '/Low_Pass_Filter' */ + /* End of SystemReset for SubSystem: '/Low_Pass_Filter' */ - /* End of SystemReset for SubSystem: '/Current_Filtering' */ + /* End of SystemReset for SubSystem: '/Current_Filtering' */ } - /* Sum: '/Sum6' incorporates: - * Interpolation_n-D: '/r_cos_M1' - * Interpolation_n-D: '/r_sin_M1' - * Product: '/Divide1' - * Product: '/Divide4' + /* Sum: '/Sum6' incorporates: + * Interpolation_n-D: '/r_cos_M1' + * Interpolation_n-D: '/r_sin_M1' + * Product: '/Divide1' + * Product: '/Divide4' */ - rtb_Gain3 = (int16_T)((rtb_Gain2_f * - rtConstP.r_cos_M1_Table[rtb_r_fieldWeak_XA_o1]) >> 14) - (int16_T) - ((rtb_Saturation * rtConstP.r_sin_M1_Table[rtb_r_fieldWeak_XA_o1]) >> 14); + rtb_Gain3 = (int16_T)((rtb_DataTypeConversion2 * + rtConstP.r_cos_M1_Table[rtb_Sum_l]) >> 14) - (int16_T)((rtb_Merge * + rtConstP.r_sin_M1_Table[rtb_Sum_l]) >> 14); if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -1815,25 +1678,25 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Outputs for IfAction SubSystem: '/Current_Filtering' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/Current_Filtering' incorporates: + * ActionPort: '/Action Port' */ - /* SignalConversion: '/TmpSignal ConversionAtLow_Pass_FilterInport1' incorporates: - * Sum: '/Sum6' + /* SignalConversion: '/TmpSignal ConversionAtLow_Pass_FilterInport1' incorporates: + * Sum: '/Sum6' */ rtb_TmpSignalConversionAtLow_Pa[0] = (int16_T)rtb_Gain3; - /* End of Outputs for SubSystem: '/Current_Filtering' */ + /* End of Outputs for SubSystem: '/Current_Filtering' */ - /* Sum: '/Sum1' incorporates: - * Interpolation_n-D: '/r_cos_M1' - * Interpolation_n-D: '/r_sin_M1' - * Product: '/Divide2' - * Product: '/Divide3' + /* Sum: '/Sum1' incorporates: + * Interpolation_n-D: '/r_cos_M1' + * Interpolation_n-D: '/r_sin_M1' + * Product: '/Divide2' + * Product: '/Divide3' */ - rtb_Gain3 = (int16_T)((rtb_Saturation * - rtConstP.r_cos_M1_Table[rtb_r_fieldWeak_XA_o1]) >> 14) + (int16_T) - ((rtb_Gain2_f * rtConstP.r_sin_M1_Table[rtb_r_fieldWeak_XA_o1]) >> 14); + rtb_Gain3 = (int16_T)((rtb_Merge * rtConstP.r_cos_M1_Table[rtb_Sum_l]) >> + 14) + (int16_T)((rtb_DataTypeConversion2 * + rtConstP.r_sin_M1_Table[rtb_Sum_l]) >> 14); if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -1842,479 +1705,416 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Outputs for IfAction SubSystem: '/Current_Filtering' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/Current_Filtering' incorporates: + * ActionPort: '/Action Port' */ - /* SignalConversion: '/TmpSignal ConversionAtLow_Pass_FilterInport1' incorporates: - * Sum: '/Sum1' + /* SignalConversion: '/TmpSignal ConversionAtLow_Pass_FilterInport1' incorporates: + * Sum: '/Sum1' */ rtb_TmpSignalConversionAtLow_Pa[1] = (int16_T)rtb_Gain3; - /* Outputs for Atomic SubSystem: '/Low_Pass_Filter' */ + /* Outputs for Atomic SubSystem: '/Low_Pass_Filter' */ Low_Pass_Filter(rtb_TmpSignalConversionAtLow_Pa, rtP->cf_currFilt, rtDW->Sum1, &rtDW->Low_Pass_Filter_m); - /* End of Outputs for SubSystem: '/Low_Pass_Filter' */ + /* End of Outputs for SubSystem: '/Low_Pass_Filter' */ - /* End of Outputs for SubSystem: '/Current_Filtering' */ + /* End of Outputs for SubSystem: '/Current_Filtering' */ } - /* End of If: '/If2' */ + /* End of If: '/If2' */ - /* If: '/If1' incorporates: - * Constant: '/Vd_max1' - * Constant: '/cf_idKi1' - * Constant: '/cf_idKp1' - * Constant: '/constant1' - * Gain: '/Gain3' - * Sum: '/Sum3' + /* If: '/If3' incorporates: + * Constant: '/Vd_max1' + * Constant: '/i_max' + * UnitDelay: '/UnitDelay5' */ - rtb_Sum2_h = rtDW->If1_ActiveSubsystem_e; - UnitDelay3 = -1; - if (rtb_LogicalOperator) { - UnitDelay3 = 0; - } - - rtDW->If1_ActiveSubsystem_e = UnitDelay3; - if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { - /* Disable for Outport: '/Vd' */ - rtDW->Switch1 = 0; - } - - if (UnitDelay3 == 0) { - if (0 != rtb_Sum2_h) { - /* SystemReset for IfAction SubSystem: '/Vd_Calculation' incorporates: - * ActionPort: '/Action Port' - */ - - /* SystemReset for Atomic SubSystem: '/PI_clamp_fixdt_id' */ - - /* SystemReset for If: '/If1' */ - PI_clamp_fixdt_Reset(&rtDW->PI_clamp_fixdt_id); - - /* End of SystemReset for SubSystem: '/PI_clamp_fixdt_id' */ - - /* End of SystemReset for SubSystem: '/Vd_Calculation' */ - } - - /* Outputs for IfAction SubSystem: '/Vd_Calculation' incorporates: - * ActionPort: '/Action Port' - */ - /* Switch: '/Switch2' incorporates: - * Constant: '/i_max' - * RelationalOperator: '/LowerRelop1' - * RelationalOperator: '/UpperRelop' - * Switch: '/Switch' - */ - if (rtb_toNegative > rtP->i_max) { - rtb_toNegative = rtP->i_max; - } else { - if (rtb_toNegative < rtb_Gain4) { - /* Switch: '/Switch' */ - rtb_toNegative = rtb_Gain4; - } - } - - /* End of Switch: '/Switch2' */ - - /* Sum: '/Sum3' */ - rtb_Gain3 = rtb_toNegative - rtDW->Sum1[1]; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; - } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; - } - } - - /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt_id' */ - PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_idKp, rtP->cf_idKi, rtP->Vd_max, - (int16_T)-rtP->Vd_max, 0, &rtDW->Switch1, - &rtDW->PI_clamp_fixdt_id); - - /* End of Outputs for SubSystem: '/PI_clamp_fixdt_id' */ - - /* End of Outputs for SubSystem: '/Vd_Calculation' */ - } - - /* End of If: '/If1' */ - - /* Abs: '/Abs5' */ - if (rtDW->Switch1 < 0) { - rtb_toNegative = (int16_T)-rtDW->Switch1; - } else { - rtb_toNegative = rtDW->Switch1; - } - - /* End of Abs: '/Abs5' */ - - /* PreLookup: '/Vq_max_XA' */ - rtb_r_fieldWeak_XA_o1 = plook_u8s16_evencka(rtb_toNegative, rtP->Vq_max_XA[0], - (uint16_T)(rtP->Vq_max_XA[1] - rtP->Vq_max_XA[0]), 45U); - - /* Gain: '/Gain5' incorporates: - * Interpolation_n-D: '/Vq_max_M1' - */ - rtb_Gain2_f = (int16_T)-rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]; - - /* Interpolation_n-D: '/iq_maxSca_M1' incorporates: - * Constant: '/i_max' - * Product: '/Divide4' - */ - rtb_Gain3 = rtb_id_fieldWeak_M1 << 16; - rtb_Gain3 = (rtb_Gain3 == MIN_int32_T) && (rtP->i_max == -1) ? MAX_int32_T : - rtb_Gain3 / rtP->i_max; - if (rtb_Gain3 < 0) { - rtb_Gain3 = 0; - } else { - if (rtb_Gain3 > 65535) { - rtb_Gain3 = 65535; - } - } - - /* Product: '/Divide1' incorporates: - * Constant: '/i_max' - * Interpolation_n-D: '/iq_maxSca_M1' - * PreLookup: '/iq_maxSca_XA' - * Product: '/Divide4' - */ - rtb_id_fieldWeak_M1 = (int16_T) - ((rtConstP.iq_maxSca_M1_Table[plook_u8u16_evencka((uint16_T)rtb_Gain3, 0U, - 1311U, 49U)] * rtP->i_max) >> 16); - - /* Gain: '/Gain1' */ - rtb_Saturation = (int16_T)-rtb_id_fieldWeak_M1; - - /* If: '/If1' incorporates: - * Constant: '/CTRL_COMM' - * Constant: '/CTRL_COMM1' - * Logic: '/Logical Operator2' - * RelationalOperator: '/Relational Operator1' - * RelationalOperator: '/Relational Operator2' - */ - rtb_Sum2_h = rtDW->If1_ActiveSubsystem_f; - UnitDelay3 = -1; - if ((rtb_Sum_l == 1) || (rtb_Sum_l == 2)) { - UnitDelay3 = 0; - } - - rtDW->If1_ActiveSubsystem_f = UnitDelay3; - if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { - /* Disable for Outport: '/iq_limProt' */ - rtDW->Divide4 = 0; - } - - if (UnitDelay3 == 0) { - /* Outputs for IfAction SubSystem: '/Current_Limit_Protection' incorporates: - * ActionPort: '/Action Port' - */ - /* Switch: '/Switch2' incorporates: - * RelationalOperator: '/LowerRelop1' - * RelationalOperator: '/UpperRelop' - * Switch: '/Switch' - */ - if (rtDW->Sum1[0] > rtb_id_fieldWeak_M1) { - rtb_toNegative = rtb_id_fieldWeak_M1; - } else if (rtDW->Sum1[0] < rtb_Saturation) { - /* Switch: '/Switch' */ - rtb_toNegative = rtb_Saturation; - } else { - rtb_toNegative = rtDW->Sum1[0]; - } - - /* End of Switch: '/Switch2' */ - - /* Product: '/Divide4' incorporates: - * Constant: '/cf_iqKpLimProt' - * Sum: '/Sum3' - */ - rtb_Gain3 = ((int16_T)(rtb_toNegative - rtDW->Sum1[0]) * - rtP->cf_iqKpLimProt) >> 8; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; - } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; - } - } - - rtDW->Divide4 = (int16_T)rtb_Gain3; - - /* End of Product: '/Divide4' */ - /* End of Outputs for SubSystem: '/Current_Limit_Protection' */ - } - - /* End of If: '/If1' */ - - /* Gain: '/Gain6' incorporates: - * Constant: '/n_max1' - */ - rtb_toNegative = (int16_T)-rtP->n_max; - - /* If: '/If2' incorporates: - * Constant: '/CTRL_COMM2' - * Constant: '/CTRL_COMM3' - * Logic: '/Logical Operator1' - * RelationalOperator: '/Relational Operator3' - * RelationalOperator: '/Relational Operator4' - */ - rtb_Sum2_h = rtDW->If2_ActiveSubsystem_c; - UnitDelay3 = -1; - if ((rtb_Sum_l == 1) || (rtb_Sum_l == 3)) { - UnitDelay3 = 0; - } - - rtDW->If2_ActiveSubsystem_c = UnitDelay3; - if ((rtb_Sum2_h != UnitDelay3) && (rtb_Sum2_h == 0)) { - /* Disable for Outport: '/n_limProt' */ - rtDW->Divide1 = 0; - } - - if (UnitDelay3 == 0) { - /* Outputs for IfAction SubSystem: '/Speed_Limit_Protection' incorporates: - * ActionPort: '/Action Port' - */ - /* Switch: '/Switch2' incorporates: - * Constant: '/n_max1' - * RelationalOperator: '/LowerRelop1' - * RelationalOperator: '/UpperRelop' - * Switch: '/Switch' - */ - if (rtb_Switch2_k > rtP->n_max) { - rtb_toNegative = rtP->n_max; - } else { - if (!(rtb_Switch2_k < rtb_toNegative)) { - rtb_toNegative = rtb_Switch2_k; - } - } - - /* End of Switch: '/Switch2' */ - - /* Product: '/Divide1' incorporates: - * Constant: '/cf_nKpLimProt' - * Sum: '/Sum1' - */ - rtb_Gain3 = ((int16_T)(rtb_toNegative - rtb_Switch2_k) * - rtP->cf_nKpLimProt) >> 8; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; - } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; - } - } - - rtDW->Divide1 = (int16_T)rtb_Gain3; - - /* End of Product: '/Divide1' */ - /* End of Outputs for SubSystem: '/Speed_Limit_Protection' */ - } - - /* End of If: '/If2' */ - - /* SwitchCase: '/Switch Case' incorporates: - * Constant: '/cf_iqKiLimProt' - * Constant: '/cf_nKi' - * Constant: '/cf_nKp' - * Inport: '/r_inpTgtSca' - * Interpolation_n-D: '/Vq_max_M1' - * Product: '/Divide1' - * SignalConversion: '/Signal Conversion2' - * Sum: '/Sum3' - */ - rtb_Sum2_h = rtDW->SwitchCase_ActiveSubsystem; - switch (rtb_Sum_l) { - case 1: - UnitDelay3 = 0; - break; - - case 2: - UnitDelay3 = 1; - break; - - case 3: - UnitDelay3 = 2; - break; - - default: - UnitDelay3 = 3; - break; - } - - rtDW->SwitchCase_ActiveSubsystem = UnitDelay3; - switch (UnitDelay3) { - case 0: - /* Outputs for IfAction SubSystem: '/Voltage_Mode' incorporates: - * ActionPort: '/Action Port' - */ - /* Sum: '/Sum3' */ - rtb_Gain3 = (rtb_Merge1 + rtDW->Divide4) + rtDW->Divide1; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; - } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; - } - } - - /* Switch: '/Switch2' incorporates: - * Interpolation_n-D: '/Vq_max_M1' - * RelationalOperator: '/LowerRelop1' - * RelationalOperator: '/UpperRelop' - * Sum: '/Sum3' - * Switch: '/Switch' - */ - if ((int16_T)rtb_Gain3 > rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]) { - /* SignalConversion: '/Signal Conversion2' */ - rtDW->Merge = rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]; - } else if ((int16_T)rtb_Gain3 < rtb_Gain2_f) { - /* Switch: '/Switch' incorporates: - * SignalConversion: '/Signal Conversion2' - */ - rtDW->Merge = rtb_Gain2_f; - } else { - /* SignalConversion: '/Signal Conversion2' */ - rtDW->Merge = (int16_T)rtb_Gain3; - } - - /* End of Switch: '/Switch2' */ - /* End of Outputs for SubSystem: '/Voltage_Mode' */ - break; - - case 1: - if (UnitDelay3 != rtb_Sum2_h) { - /* SystemReset for IfAction SubSystem: '/Speed_Mode' incorporates: - * ActionPort: '/Action Port' - */ - - /* SystemReset for Atomic SubSystem: '/PI_clamp_fixdt_n' */ - - /* SystemReset for SwitchCase: '/Switch Case' */ - PI_clamp_fixdt_n_Reset(&rtDW->PI_clamp_fixdt_n_o); - - /* End of SystemReset for SubSystem: '/PI_clamp_fixdt_n' */ - - /* End of SystemReset for SubSystem: '/Speed_Mode' */ - } - - /* Outputs for IfAction SubSystem: '/Speed_Mode' incorporates: - * ActionPort: '/Action Port' - */ - /* Sum: '/Sum3' */ - rtb_Gain3 = rtb_Merge1 - rtb_Switch2_k; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; - } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; - } - } - - /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt_n' */ - rtDW->Merge = (int16_T) PI_clamp_fixdt_n((int16_T)rtb_Gain3, rtP->cf_nKp, - rtP->cf_nKi, rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1], rtb_Gain2_f, - (int16_T)((rtDW->Divide4 * rtP->cf_iqKiLimProt) >> 10), - &rtDW->PI_clamp_fixdt_n_o); - - /* End of Outputs for SubSystem: '/PI_clamp_fixdt_n' */ - - /* End of Outputs for SubSystem: '/Speed_Mode' */ - break; - - case 2: - if (UnitDelay3 != rtb_Sum2_h) { - /* SystemReset for IfAction SubSystem: '/Torque_Mode' incorporates: - * ActionPort: '/Action Port' - */ - - /* SystemReset for Atomic SubSystem: '/PI_clamp_fixdt_iq' */ - - /* SystemReset for SwitchCase: '/Switch Case' */ - PI_clamp_fixdt_Reset(&rtDW->PI_clamp_fixdt_iq); - - /* End of SystemReset for SubSystem: '/PI_clamp_fixdt_iq' */ - - /* End of SystemReset for SubSystem: '/Torque_Mode' */ - } - - /* Outputs for IfAction SubSystem: '/Torque_Mode' incorporates: + if (rtDW->UnitDelay5_DSTATE_l) { + /* Outputs for IfAction SubSystem: '/Motor_Limitations' incorporates: * ActionPort: '/Action Port' */ - /* Sum: '/Sum2' */ - rtb_Gain3 = rtb_Merge1 + rtDW->Divide1; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; + rtDW->Vd_max1 = rtP->Vd_max; + + /* Gain: '/Gain3' incorporates: + * Constant: '/Vd_max1' + */ + rtDW->Gain3 = (int16_T)-rtDW->Vd_max1; + + /* Interpolation_n-D: '/Vq_max_M1' incorporates: + * Abs: '/Abs5' + * PreLookup: '/Vq_max_XA' + * UnitDelay: '/UnitDelay4' + */ + if (rtDW->UnitDelay4_DSTATE_h < 0) { + rtb_Merge_f_idx_1 = (int16_T)-rtDW->UnitDelay4_DSTATE_h; } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; + rtb_Merge_f_idx_1 = rtDW->UnitDelay4_DSTATE_h; + } + + rtDW->Vq_max_M1 = rtP->Vq_max_M1[plook_u8s16_evencka(rtb_Merge_f_idx_1, + rtP->Vq_max_XA[0], (uint16_T)(rtP->Vq_max_XA[1] - rtP->Vq_max_XA[0]), + 45U)]; + + /* End of Interpolation_n-D: '/Vq_max_M1' */ + + /* Gain: '/Gain5' */ + rtDW->Gain5 = (int16_T)-rtDW->Vq_max_M1; + rtDW->i_max = rtP->i_max; + + /* Interpolation_n-D: '/iq_maxSca_M1' incorporates: + * Constant: '/i_max' + * Product: '/Divide4' + */ + rtb_Gain3 = rtDW->Divide3 << 16; + rtb_Gain3 = (rtb_Gain3 == MIN_int32_T) && (rtDW->i_max == -1) ? + MAX_int32_T : rtb_Gain3 / rtDW->i_max; + if (rtb_Gain3 < 0) { + rtb_Gain3 = 0; + } else { + if (rtb_Gain3 > 65535) { + rtb_Gain3 = 65535; } } - /* Switch: '/Switch2' incorporates: - * RelationalOperator: '/LowerRelop1' - * Sum: '/Sum2' + /* Product: '/Divide1' incorporates: + * Interpolation_n-D: '/iq_maxSca_M1' + * PreLookup: '/iq_maxSca_XA' + * Product: '/Divide4' */ - if (!((int16_T)rtb_Gain3 > rtb_id_fieldWeak_M1)) { - /* Switch: '/Switch' incorporates: - * RelationalOperator: '/UpperRelop' - */ - if ((int16_T)rtb_Gain3 < rtb_Saturation) { - rtb_id_fieldWeak_M1 = rtb_Saturation; + rtDW->Divide1_a = (int16_T) + ((rtConstP.iq_maxSca_M1_Table[plook_u8u16_evencka((uint16_T)rtb_Gain3, + 0U, 1311U, 49U)] * rtDW->i_max) >> 16); + + /* Gain: '/Gain1' */ + rtDW->Gain1 = (int16_T)-rtDW->Divide1_a; + + /* SwitchCase: '/Switch Case' incorporates: + * Constant: '/n_max1' + * Constant: '/Constant1' + * Constant: '/cf_KbLimProt' + * Constant: '/cf_nKiLimProt' + * Constant: '/Constant' + * Constant: '/Constant1' + * Constant: '/cf_KbLimProt' + * Constant: '/cf_iqKiLimProt' + * Constant: '/cf_nKiLimProt' + * Sum: '/Sum1' + * Sum: '/Sum1' + * Sum: '/Sum2' + */ + switch (rtDW->z_ctrlMod) { + case 1: + /* Abs: '/Abs5' */ + if (rtDW->Sum1[0] < 0) { + rtb_Merge_f_idx_1 = (int16_T)-rtDW->Sum1[0]; } else { - rtb_id_fieldWeak_M1 = (int16_T)rtb_Gain3; + rtb_Merge_f_idx_1 = rtDW->Sum1[0]; } - /* End of Switch: '/Switch' */ - } + /* End of Abs: '/Abs5' */ - /* End of Switch: '/Switch2' */ + /* Outputs for IfAction SubSystem: '/Voltage_Mode_Protection' incorporates: + * ActionPort: '/Action Port' + */ - /* Sum: '/Sum1' */ - rtb_Gain3 = rtb_id_fieldWeak_M1 - rtDW->Sum1[0]; - if (rtb_Gain3 > 32767) { - rtb_Gain3 = 32767; - } else { - if (rtb_Gain3 < -32768) { - rtb_Gain3 = -32768; + /* Outputs for Atomic SubSystem: '/I_backCalc_fixdt' */ + I_backCalc_fixdt((int16_T)(rtDW->Divide1_a - rtb_Merge_f_idx_1), + rtP->cf_iqKiLimProt, rtP->cf_KbLimProt, rtb_Switch2_l, + 0, &rtDW->Switch2_c, &rtDW->I_backCalc_fixdt_i); + + /* End of Outputs for SubSystem: '/I_backCalc_fixdt' */ + + /* Outputs for Atomic SubSystem: '/I_backCalc_fixdt1' */ + I_backCalc_fixdt((int16_T)(rtP->n_max - rtb_Abs5), rtP->cf_nKiLimProt, + rtP->cf_KbLimProt, rtb_Switch2_l, 0, &rtDW->Switch2_l, + &rtDW->I_backCalc_fixdt1); + + /* End of Outputs for SubSystem: '/I_backCalc_fixdt1' */ + + /* End of Outputs for SubSystem: '/Voltage_Mode_Protection' */ + break; + + case 2: + /* Outputs for IfAction SubSystem: '/Speed_Mode_Protection' incorporates: + * ActionPort: '/Action Port' + */ + /* Switch: '/Switch2' incorporates: + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtDW->Sum1[0] > rtDW->Divide1_a) { + rtb_Merge_f_idx_1 = rtDW->Divide1_a; + } else if (rtDW->Sum1[0] < rtDW->Gain1) { + /* Switch: '/Switch' */ + rtb_Merge_f_idx_1 = rtDW->Gain1; + } else { + rtb_Merge_f_idx_1 = rtDW->Sum1[0]; } + + /* End of Switch: '/Switch2' */ + + /* Product: '/Divide1' incorporates: + * Constant: '/cf_iqKiLimProt' + * Sum: '/Sum3' + */ + rtDW->Divide1 = (int16_T)(rtb_Merge_f_idx_1 - rtDW->Sum1[0]) * + rtP->cf_iqKiLimProt; + + /* End of Outputs for SubSystem: '/Speed_Mode_Protection' */ + break; + + case 3: + /* Outputs for IfAction SubSystem: '/Torque_Mode_Protection' incorporates: + * ActionPort: '/Action Port' + */ + + /* Outputs for Atomic SubSystem: '/I_backCalc_fixdt' */ + I_backCalc_fixdt((int16_T)(rtP->n_max - rtb_Abs5), rtP->cf_nKiLimProt, + rtP->cf_KbLimProt, rtDW->Vq_max_M1, 0, &rtDW->Switch2, + &rtDW->I_backCalc_fixdt_g); + + /* End of Outputs for SubSystem: '/I_backCalc_fixdt' */ + + /* End of Outputs for SubSystem: '/Torque_Mode_Protection' */ + break; } - /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt_iq' */ + /* End of SwitchCase: '/Switch Case' */ - /* SignalConversion: '/Signal Conversion2' incorporates: - * Constant: '/cf_iqKi' - * Constant: '/cf_iqKp' - * Constant: '/constant' - * Interpolation_n-D: '/Vq_max_M1' - * Sum: '/Sum1' - */ - PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_iqKp, rtP->cf_iqKi, - rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1], rtb_Gain2_f, 0, - &rtDW->Merge, &rtDW->PI_clamp_fixdt_iq); + /* Gain: '/Gain4' */ + rtDW->Gain4_c = (int16_T)-rtDW->i_max; - /* End of Outputs for SubSystem: '/PI_clamp_fixdt_iq' */ - - /* End of Outputs for SubSystem: '/Torque_Mode' */ - break; - - case 3: - /* Outputs for IfAction SubSystem: '/Open_Mode' incorporates: - * ActionPort: '/Action Port' - */ - rtDW->Merge = rtb_Merge1; - - /* End of Outputs for SubSystem: '/Open_Mode' */ - break; + /* End of Outputs for SubSystem: '/Motor_Limitations' */ } - /* End of SwitchCase: '/Switch Case' */ + /* End of If: '/If3' */ - /* Sum: '/Sum6' incorporates: - * Product: '/Divide1' - * Product: '/Divide4' + /* If: '/If1' incorporates: + * UnitDelay: '/UnitDelay6' */ - rtb_Gain3 = (int16_T)((rtDW->Switch1 * rtb_Merge) >> 14) - (int16_T) - ((rtDW->Merge * rtb_MinMax2) >> 14); + if (rtDW->UnitDelay6_DSTATE) { + /* Outputs for IfAction SubSystem: '/FOC' incorporates: + * ActionPort: '/Action Port' + */ + /* If: '/If1' incorporates: + * Constant: '/cf_idKi1' + * Constant: '/cf_idKp1' + * Constant: '/constant1' + * Sum: '/Sum3' + */ + if (rtb_LogicalOperator) { + /* Outputs for IfAction SubSystem: '/Vd_Calculation' incorporates: + * ActionPort: '/Action Port' + */ + /* Switch: '/Switch2' incorporates: + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtb_toNegative > rtDW->i_max) { + rtb_toNegative = rtDW->i_max; + } else { + if (rtb_toNegative < rtDW->Gain4_c) { + /* Switch: '/Switch' */ + rtb_toNegative = rtDW->Gain4_c; + } + } + + /* End of Switch: '/Switch2' */ + + /* Sum: '/Sum3' */ + rtb_Gain3 = rtb_toNegative - rtDW->Sum1[1]; + if (rtb_Gain3 > 32767) { + rtb_Gain3 = 32767; + } else { + if (rtb_Gain3 < -32768) { + rtb_Gain3 = -32768; + } + } + + /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt' */ + PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_idKp, rtP->cf_idKi, + rtDW->Vd_max1, rtDW->Gain3, 0, &rtDW->Switch1, + &rtDW->PI_clamp_fixdt_k); + + /* End of Outputs for SubSystem: '/PI_clamp_fixdt' */ + + /* End of Outputs for SubSystem: '/Vd_Calculation' */ + } + + /* End of If: '/If1' */ + + /* SwitchCase: '/Switch Case' incorporates: + * Constant: '/cf_nKi' + * Constant: '/cf_nKp' + * Constant: '/cf_iqKi' + * Constant: '/cf_iqKp' + * Constant: '/constant2' + * Inport: '/r_inpTgtSca' + * Sum: '/Sum3' + * Sum: '/Sum2' + */ + switch (rtDW->z_ctrlMod) { + case 1: + /* Outputs for IfAction SubSystem: '/Voltage_Mode' incorporates: + * ActionPort: '/Action Port' + */ + /* MinMax: '/MinMax' */ + if (!(rtb_Switch2_l < rtDW->Switch2_c)) { + rtb_Switch2_l = rtDW->Switch2_c; + } + + if (!(rtb_Switch2_l < rtDW->Switch2_l)) { + rtb_Switch2_l = rtDW->Switch2_l; + } + + /* End of MinMax: '/MinMax' */ + + /* Signum: '/SignDeltaU2' */ + if (rtDW->Merge1 < 0) { + rtb_Merge_f_idx_1 = -1; + } else { + rtb_Merge_f_idx_1 = (int16_T)(rtDW->Merge1 > 0); + } + + /* End of Signum: '/SignDeltaU2' */ + + /* Product: '/Divide1' */ + rtb_Merge = (int16_T)(rtb_Switch2_l * rtb_Merge_f_idx_1); + + /* Switch: '/Switch2' incorporates: + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtb_Merge > rtDW->Vq_max_M1) { + /* SignalConversion: '/Signal Conversion2' */ + rtDW->Merge = rtDW->Vq_max_M1; + } else if (rtb_Merge < rtDW->Gain5) { + /* Switch: '/Switch' incorporates: + * SignalConversion: '/Signal Conversion2' + */ + rtDW->Merge = rtDW->Gain5; + } else { + /* SignalConversion: '/Signal Conversion2' incorporates: + * Switch: '/Switch' + */ + rtDW->Merge = rtb_Merge; + } + + /* End of Switch: '/Switch2' */ + /* End of Outputs for SubSystem: '/Voltage_Mode' */ + break; + + case 2: + /* Outputs for IfAction SubSystem: '/Speed_Mode' incorporates: + * ActionPort: '/Action Port' + */ + /* Sum: '/Sum3' */ + rtb_Gain3 = rtDW->Merge1 - rtb_Switch2_k; + if (rtb_Gain3 > 32767) { + rtb_Gain3 = 32767; + } else { + if (rtb_Gain3 < -32768) { + rtb_Gain3 = -32768; + } + } + + /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt' */ + PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_nKp, rtP->cf_nKi, + rtDW->Vq_max_M1, rtDW->Gain5, rtDW->Divide1, &rtDW->Merge, + &rtDW->PI_clamp_fixdt_o); + + /* End of Outputs for SubSystem: '/PI_clamp_fixdt' */ + + /* End of Outputs for SubSystem: '/Speed_Mode' */ + break; + + case 3: + /* Outputs for IfAction SubSystem: '/Torque_Mode' incorporates: + * ActionPort: '/Action Port' + */ + /* Gain: '/Gain4' */ + rtb_Merge = (int16_T)-rtDW->Switch2; + + /* Switch: '/Switch2' incorporates: + * RelationalOperator: '/LowerRelop1' + * RelationalOperator: '/UpperRelop' + * Switch: '/Switch' + */ + if (rtDW->Merge1 > rtDW->Divide1_a) { + rtb_Merge_f_idx_1 = rtDW->Divide1_a; + } else if (rtDW->Merge1 < rtDW->Gain1) { + /* Switch: '/Switch' */ + rtb_Merge_f_idx_1 = rtDW->Gain1; + } else { + rtb_Merge_f_idx_1 = rtDW->Merge1; + } + + /* End of Switch: '/Switch2' */ + + /* Sum: '/Sum2' */ + rtb_Gain3 = rtb_Merge_f_idx_1 - rtDW->Sum1[0]; + if (rtb_Gain3 > 32767) { + rtb_Gain3 = 32767; + } else { + if (rtb_Gain3 < -32768) { + rtb_Gain3 = -32768; + } + } + + /* MinMax: '/MinMax1' */ + if (rtDW->Vq_max_M1 < rtDW->Switch2) { + rtb_Merge_f_idx_1 = rtDW->Vq_max_M1; + } else { + rtb_Merge_f_idx_1 = rtDW->Switch2; + } + + /* End of MinMax: '/MinMax1' */ + + /* MinMax: '/MinMax2' */ + if (!(rtb_Merge > rtDW->Gain5)) { + rtb_Merge = rtDW->Gain5; + } + + /* End of MinMax: '/MinMax2' */ + + /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt' */ + PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_iqKp, rtP->cf_iqKi, + rtb_Merge_f_idx_1, rtb_Merge, 0, &rtDW->Merge, + &rtDW->PI_clamp_fixdt_a); + + /* End of Outputs for SubSystem: '/PI_clamp_fixdt' */ + + /* End of Outputs for SubSystem: '/Torque_Mode' */ + break; + + default: + /* Outputs for IfAction SubSystem: '/Open_Mode' incorporates: + * ActionPort: '/Action Port' + */ + rtDW->Merge = rtDW->Merge1; + + /* End of Outputs for SubSystem: '/Open_Mode' */ + break; + } + + /* End of SwitchCase: '/Switch Case' */ + /* End of Outputs for SubSystem: '/FOC' */ + } + + /* End of If: '/If1' */ + + /* Sum: '/Sum6' incorporates: + * Interpolation_n-D: '/r_cos_M1' + * Interpolation_n-D: '/r_sin_M1' + * Product: '/Divide1' + * Product: '/Divide4' + */ + rtb_Gain3 = (int16_T)((rtDW->Switch1 * rtConstP.r_cos_M1_Table[rtb_Sum_l]) >> + 14) - (int16_T)((rtDW->Merge * + rtConstP.r_sin_M1_Table[rtb_Sum_l]) >> 14); if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -2323,12 +2123,15 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Sum: '/Sum1' incorporates: - * Product: '/Divide2' - * Product: '/Divide3' + /* Sum: '/Sum1' incorporates: + * Interpolation_n-D: '/r_cos_M1' + * Interpolation_n-D: '/r_sin_M1' + * Product: '/Divide2' + * Product: '/Divide3' */ - rtb_DataTypeConversion = (int16_T)((rtDW->Switch1 * rtb_MinMax2) >> 14) + - (int16_T)((rtDW->Merge * rtb_Merge) >> 14); + rtb_DataTypeConversion = (int16_T)((rtDW->Switch1 * + rtConstP.r_sin_M1_Table[rtb_Sum_l]) >> 14) + (int16_T)((rtDW->Merge * + rtConstP.r_cos_M1_Table[rtb_Sum_l]) >> 14); if (rtb_DataTypeConversion > 32767) { rtb_DataTypeConversion = 32767; } else { @@ -2337,15 +2140,15 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Gain: '/Gain1' incorporates: - * Sum: '/Sum1' + /* Gain: '/Gain1' incorporates: + * Sum: '/Sum1' */ - rtb_DataTypeConversion = 14189 * (int16_T)rtb_DataTypeConversion; + rtb_DataTypeConversion *= 14189; - /* Sum: '/Sum6' incorporates: - * Gain: '/Gain1' - * Gain: '/Gain3' - * Sum: '/Sum6' + /* Sum: '/Sum6' incorporates: + * Gain: '/Gain1' + * Gain: '/Gain3' + * Sum: '/Sum6' */ rtb_DataTypeConversion = (((rtb_DataTypeConversion < 0 ? 16383 : 0) + rtb_DataTypeConversion) >> 14) - ((int16_T)(((int16_T)rtb_Gain3 < 0) + @@ -2358,9 +2161,9 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Sum: '/Sum2' incorporates: - * Sum: '/Sum6' - * Sum: '/Sum6' + /* Sum: '/Sum2' incorporates: + * Sum: '/Sum6' + * Sum: '/Sum6' */ rtb_Switch1 = -(int16_T)rtb_Gain3 - (int16_T)rtb_DataTypeConversion; if (rtb_Switch1 > 32767) { @@ -2371,39 +2174,39 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* MinMax: '/MinMax1' incorporates: - * Sum: '/Sum2' - * Sum: '/Sum6' - * Sum: '/Sum6' + /* MinMax: '/MinMax1' incorporates: + * Sum: '/Sum2' + * Sum: '/Sum6' + * Sum: '/Sum6' + */ + rtb_Switch2_l = (int16_T)rtb_Gain3; + if (!((int16_T)rtb_Gain3 < (int16_T)rtb_DataTypeConversion)) { + rtb_Switch2_l = (int16_T)rtb_DataTypeConversion; + } + + if (!(rtb_Switch2_l < (int16_T)rtb_Switch1)) { + rtb_Switch2_l = (int16_T)rtb_Switch1; + } + + /* MinMax: '/MinMax2' incorporates: + * Sum: '/Sum2' + * Sum: '/Sum6' + * Sum: '/Sum6' */ rtb_Merge = (int16_T)rtb_Gain3; - if (!((int16_T)rtb_Gain3 < (int16_T)rtb_DataTypeConversion)) { + if (!((int16_T)rtb_Gain3 > (int16_T)rtb_DataTypeConversion)) { rtb_Merge = (int16_T)rtb_DataTypeConversion; } - if (!(rtb_Merge < (int16_T)rtb_Switch1)) { + if (!(rtb_Merge > (int16_T)rtb_Switch1)) { rtb_Merge = (int16_T)rtb_Switch1; } - /* MinMax: '/MinMax2' incorporates: - * Sum: '/Sum2' - * Sum: '/Sum6' - * Sum: '/Sum6' + /* Sum: '/Add' incorporates: + * MinMax: '/MinMax1' + * MinMax: '/MinMax2' */ - rtb_Saturation = (int16_T)rtb_Gain3; - if (!((int16_T)rtb_Gain3 > (int16_T)rtb_DataTypeConversion)) { - rtb_Saturation = (int16_T)rtb_DataTypeConversion; - } - - if (!(rtb_Saturation > (int16_T)rtb_Switch1)) { - rtb_Saturation = (int16_T)rtb_Switch1; - } - - /* Sum: '/Add' incorporates: - * MinMax: '/MinMax1' - * MinMax: '/MinMax2' - */ - rtb_Sum1 = rtb_Merge + rtb_Saturation; + rtb_Sum1 = rtb_Switch2_l + rtb_Merge; if (rtb_Sum1 > 32767) { rtb_Sum1 = 32767; } else { @@ -2412,15 +2215,15 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Gain: '/Gain2' incorporates: - * Sum: '/Add' + /* Gain: '/Gain2' incorporates: + * Sum: '/Add' */ - rtb_Gain2_f = (int16_T)(rtb_Sum1 >> 1); + rtb_DataTypeConversion2 = (int16_T)(rtb_Sum1 >> 1); - /* Sum: '/Add1' incorporates: - * Sum: '/Sum6' + /* Sum: '/Add1' incorporates: + * Sum: '/Sum6' */ - rtb_Gain3 = (int16_T)rtb_Gain3 - rtb_Gain2_f; + rtb_Gain3 = (int16_T)rtb_Gain3 - rtb_DataTypeConversion2; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -2429,15 +2232,15 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Gain: '/Gain4' incorporates: - * Sum: '/Add1' + /* Gain: '/Gain4' incorporates: + * Sum: '/Add1' */ rtDW->Gain4[0] = (int16_T)((18919 * rtb_Gain3) >> 14); - /* Sum: '/Add1' incorporates: - * Sum: '/Sum6' + /* Sum: '/Add1' incorporates: + * Sum: '/Sum6' */ - rtb_Gain3 = (int16_T)rtb_DataTypeConversion - rtb_Gain2_f; + rtb_Gain3 = (int16_T)rtb_DataTypeConversion - rtb_DataTypeConversion2; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -2446,15 +2249,15 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Gain: '/Gain4' incorporates: - * Sum: '/Add1' + /* Gain: '/Gain4' incorporates: + * Sum: '/Add1' */ rtDW->Gain4[1] = (int16_T)((18919 * rtb_Gain3) >> 14); - /* Sum: '/Add1' incorporates: - * Sum: '/Sum2' + /* Sum: '/Add1' incorporates: + * Sum: '/Sum2' */ - rtb_Gain3 = (int16_T)rtb_Switch1 - rtb_Gain2_f; + rtb_Gain3 = (int16_T)rtb_Switch1 - rtb_DataTypeConversion2; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -2463,220 +2266,202 @@ void BLDC_controller_step(RT_MODEL *const rtM) } } - /* Gain: '/Gain4' incorporates: - * Sum: '/Add1' + /* Gain: '/Gain4' incorporates: + * Sum: '/Add1' */ rtDW->Gain4[2] = (int16_T)((18919 * rtb_Gain3) >> 14); - /* End of Outputs for SubSystem: '/F04_Field_Oriented_Control' */ + /* Update for UnitDelay: '/UnitDelay4' */ + rtDW->UnitDelay4_DSTATE_h = rtDW->Switch1; + + /* End of Outputs for SubSystem: '/F05_Field_Oriented_Control' */ } /* End of If: '/If1' */ - /* Switch: '/Switch2' incorporates: + /* Switch: '/Switch2' incorporates: * Constant: '/z_ctrlTypSel1' - * Constant: '/CTRL_COMM1' - * RelationalOperator: '/Relational Operator6' + * Constant: '/CTRL_COMM1' + * RelationalOperator: '/Relational Operator6' */ if (rtP->z_ctrlTypSel == 2) { rtb_Merge = rtDW->Merge; } else { - rtb_Merge = rtb_Merge1; + rtb_Merge = rtDW->Merge1; } - /* End of Switch: '/Switch2' */ + /* End of Switch: '/Switch2' */ - /* If: '/If' incorporates: + /* If: '/If' incorporates: + * Constant: '/vec_hallToPos' * Constant: '/z_ctrlTypSel1' - * Constant: '/CTRL_COMM2' - * Constant: '/CTRL_COMM3' - * Constant: '/vec_hallToPos' - * Inport: '/V_phaABC_FOC_in' - * Logic: '/Logical Operator1' - * Logic: '/Logical Operator2' - * LookupNDDirect: '/z_commutMap_M1' - * RelationalOperator: '/Relational Operator1' - * RelationalOperator: '/Relational Operator2' - * Selector: '/Selector' + * Constant: '/CTRL_COMM2' + * Constant: '/CTRL_COMM3' + * Inport: '/V_phaABC_FOC_in' + * Logic: '/Logical Operator1' + * Logic: '/Logical Operator2' + * LookupNDDirect: '/z_commutMap_M1' + * RelationalOperator: '/Relational Operator1' + * RelationalOperator: '/Relational Operator2' + * Selector: '/Selector' * - * About '/z_commutMap_M1': + * About '/z_commutMap_M1': * 2-dimensional Direct Look-Up returning a Column */ if (rtb_LogicalOperator && (rtP->z_ctrlTypSel == 2)) { - /* Outputs for IfAction SubSystem: '/F05_02_FOC_Method' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/FOC_Method' incorporates: + * ActionPort: '/Action Port' */ - rtb_Saturation = rtDW->Gain4[0]; - rtb_id_fieldWeak_M1 = rtDW->Gain4[1]; - rtb_Merge1 = rtDW->Gain4[2]; + rtb_DataTypeConversion2 = rtDW->Gain4[0]; + rtb_Merge_f_idx_1 = rtDW->Gain4[1]; + rtb_Saturation1 = rtDW->Gain4[2]; - /* End of Outputs for SubSystem: '/F05_02_FOC_Method' */ + /* End of Outputs for SubSystem: '/FOC_Method' */ } else if (rtb_LogicalOperator && (rtP->z_ctrlTypSel == 1)) { - /* Outputs for IfAction SubSystem: '/F05_01_SIN_Method' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/SIN_Method' incorporates: + * ActionPort: '/Action Port' */ - /* Relay: '/n_fieldWeakAuth' */ - if (rtb_Abs5 >= rtP->n_fieldWeakAuthHi) { - rtDW->n_fieldWeakAuth_Mode_m = true; - } else { - if (rtb_Abs5 <= rtP->n_fieldWeakAuthLo) { - rtDW->n_fieldWeakAuth_Mode_m = false; - } - } - - /* Switch: '/Switch_PhaAdv' incorporates: - * Constant: '/b_fieldWeakEna' - * Logic: '/Logical Operator1' - * Product: '/Divide2' - * Product: '/Divide3' - * Relay: '/n_fieldWeakAuth' - * Sum: '/Sum3' + /* Switch: '/Switch_PhaAdv' incorporates: + * Constant: '/b_fieldWeakEna' + * Product: '/Divide2' + * Product: '/Divide3' + * Sum: '/Sum3' */ - if (rtP->b_fieldWeakEna && rtDW->n_fieldWeakAuth_Mode_m) { - /* Abs: '/Abs5' */ - if (rtb_Merge1 < 0) { - rtb_id_fieldWeak_M1 = (int16_T)-rtb_Merge1; - } else { - rtb_id_fieldWeak_M1 = rtb_Merge1; - } - - /* End of Abs: '/Abs5' */ - - /* PreLookup: '/r_phaAdv_XA' */ - rtb_Sum = plook_u8s16u8n7_evenc_s(rtb_id_fieldWeak_M1, rtP->r_phaAdv_XA[0], - (uint16_T)(rtP->r_phaAdv_XA[1] - rtP->r_phaAdv_XA[0]), 10U, - &rtb_r_fieldWeak_XA_o1); - - /* Interpolation_n-D: '/a_phaAdv_M1' */ - rtb_MinMax2 = intrp1d_s16s32s32u8u8n7l_s(rtb_Sum, rtb_r_fieldWeak_XA_o1, - rtP->a_phaAdv_M1); - - /* Sum: '/Sum3' incorporates: - * Product: '/Product2' + if (rtP->b_fieldWeakEna) { + /* Sum: '/Sum3' incorporates: + * Product: '/Product2' */ - rtb_MinMax2 = (int16_T)(((int16_T)(rtb_MinMax2 * rtDW->Switch2) >> 2) + - rtb_Switch2_fl); - rtb_MinMax2 -= (int16_T)(23040 * (int16_T)div_nde_s32_floor(rtb_MinMax2, - 23040)); + rtb_Saturation1 = (int16_T)((int16_T)((int16_T)(rtDW->Divide3 * + rtDW->Switch2_e) << 2) + rtb_Switch2_fl); + rtb_Saturation1 -= (int16_T)(23040 * (int16_T)div_nde_s32_floor + (rtb_Saturation1, 23040)); } else { - rtb_MinMax2 = rtb_Switch2_fl; + rtb_Saturation1 = rtb_Switch2_fl; } - /* End of Switch: '/Switch_PhaAdv' */ + /* End of Switch: '/Switch_PhaAdv' */ - /* PreLookup: '/a_elecAngle_XA' */ - rtb_Sum = plook_u8s16_evencka(rtb_MinMax2, 0, 128U, 180U); + /* PreLookup: '/a_elecAngle_XA' */ + rtb_Sum = plook_u8s16_evencka(rtb_Saturation1, 0, 128U, 180U); - /* Product: '/Divide2' incorporates: - * Interpolation_n-D: '/r_sin3PhaA_M1' - * Interpolation_n-D: '/r_sin3PhaB_M1' - * Interpolation_n-D: '/r_sin3PhaC_M1' + /* Product: '/Divide2' incorporates: + * Interpolation_n-D: '/r_sin3PhaA_M1' + * Interpolation_n-D: '/r_sin3PhaB_M1' + * Interpolation_n-D: '/r_sin3PhaC_M1' */ - rtb_Saturation = (int16_T)((rtb_Merge1 * + rtb_DataTypeConversion2 = (int16_T)((rtDW->Merge1 * rtConstP.r_sin3PhaA_M1_Table[rtb_Sum]) >> 14); - rtb_id_fieldWeak_M1 = (int16_T)((rtb_Merge1 * + rtb_Merge_f_idx_1 = (int16_T)((rtDW->Merge1 * rtConstP.r_sin3PhaB_M1_Table[rtb_Sum]) >> 14); - rtb_Merge1 = (int16_T)((rtb_Merge1 * rtConstP.r_sin3PhaC_M1_Table[rtb_Sum]) >> - 14); + rtb_Saturation1 = (int16_T)((rtDW->Merge1 * + rtConstP.r_sin3PhaC_M1_Table[rtb_Sum]) >> 14); - /* End of Outputs for SubSystem: '/F05_01_SIN_Method' */ + /* End of Outputs for SubSystem: '/SIN_Method' */ } else { - /* Outputs for IfAction SubSystem: '/F05_00_COM_Method' incorporates: - * ActionPort: '/Action Port' + /* Outputs for IfAction SubSystem: '/COM_Method' incorporates: + * ActionPort: '/Action Port' */ if (rtConstP.vec_hallToPos_Value[rtb_Sum] > 5) { - /* LookupNDDirect: '/z_commutMap_M1' + /* LookupNDDirect: '/z_commutMap_M1' * - * About '/z_commutMap_M1': + * About '/z_commutMap_M1': * 2-dimensional Direct Look-Up returning a Column */ rtb_Sum2_h = 5; } else if (rtConstP.vec_hallToPos_Value[rtb_Sum] < 0) { - /* LookupNDDirect: '/z_commutMap_M1' + /* LookupNDDirect: '/z_commutMap_M1' * - * About '/z_commutMap_M1': + * About '/z_commutMap_M1': * 2-dimensional Direct Look-Up returning a Column */ rtb_Sum2_h = 0; } else { - /* LookupNDDirect: '/z_commutMap_M1' incorporates: - * Constant: '/vec_hallToPos' - * Selector: '/Selector' + /* LookupNDDirect: '/z_commutMap_M1' incorporates: + * Constant: '/vec_hallToPos' + * Selector: '/Selector' * - * About '/z_commutMap_M1': + * About '/z_commutMap_M1': * 2-dimensional Direct Look-Up returning a Column */ rtb_Sum2_h = rtConstP.vec_hallToPos_Value[rtb_Sum]; } - /* LookupNDDirect: '/z_commutMap_M1' incorporates: - * Constant: '/vec_hallToPos' - * Selector: '/Selector' + /* LookupNDDirect: '/z_commutMap_M1' incorporates: + * Constant: '/vec_hallToPos' + * Selector: '/Selector' * - * About '/z_commutMap_M1': + * About '/z_commutMap_M1': * 2-dimensional Direct Look-Up returning a Column */ rtb_DataTypeConversion = rtb_Sum2_h * 3; - /* Product: '/Divide2' incorporates: - * LookupNDDirect: '/z_commutMap_M1' + /* Product: '/Divide2' incorporates: + * LookupNDDirect: '/z_commutMap_M1' * - * About '/z_commutMap_M1': + * About '/z_commutMap_M1': * 2-dimensional Direct Look-Up returning a Column */ - rtb_Saturation = (int16_T)(rtb_Merge * + rtb_DataTypeConversion2 = (int16_T)(rtb_Merge * rtConstP.z_commutMap_M1_table[rtb_DataTypeConversion]); - rtb_id_fieldWeak_M1 = (int16_T)(rtConstP.z_commutMap_M1_table[1 + + rtb_Merge_f_idx_1 = (int16_T)(rtConstP.z_commutMap_M1_table[1 + rtb_DataTypeConversion] * rtb_Merge); - rtb_Merge1 = (int16_T)(rtConstP.z_commutMap_M1_table[2 + + rtb_Saturation1 = (int16_T)(rtConstP.z_commutMap_M1_table[2 + rtb_DataTypeConversion] * rtb_Merge); - /* End of Outputs for SubSystem: '/F05_00_COM_Method' */ + /* End of Outputs for SubSystem: '/COM_Method' */ } - /* End of If: '/If' */ + /* End of If: '/If' */ /* Outport: '/DC_phaA' incorporates: - * DataTypeConversion: '/Data Type Conversion6' + * DataTypeConversion: '/Data Type Conversion6' */ - rtY->DC_phaA = (int16_T)(rtb_Saturation >> 4); + rtY->DC_phaA = (int16_T)(rtb_DataTypeConversion2 >> 4); /* Outport: '/DC_phaB' incorporates: - * DataTypeConversion: '/Data Type Conversion6' + * DataTypeConversion: '/Data Type Conversion6' */ - rtY->DC_phaB = (int16_T)(rtb_id_fieldWeak_M1 >> 4); + rtY->DC_phaB = (int16_T)(rtb_Merge_f_idx_1 >> 4); - /* Update for UnitDelay: '/UnitDelay3' incorporates: + /* Update for UnitDelay: '/UnitDelay3' incorporates: * Inport: '/b_hallA ' */ rtDW->UnitDelay3_DSTATE_fy = rtU->b_hallA; - /* Update for UnitDelay: '/UnitDelay1' incorporates: + /* Update for UnitDelay: '/UnitDelay1' incorporates: * Inport: '/b_hallB' */ rtDW->UnitDelay1_DSTATE = rtU->b_hallB; - /* Update for UnitDelay: '/UnitDelay2' incorporates: + /* Update for UnitDelay: '/UnitDelay2' incorporates: * Inport: '/b_hallC' */ rtDW->UnitDelay2_DSTATE_f = rtU->b_hallC; - /* Update for UnitDelay: '/UnitDelay3' */ + /* Update for UnitDelay: '/UnitDelay3' */ rtDW->UnitDelay3_DSTATE = rtb_Switch1_l; - /* Update for UnitDelay: '/UnitDelay4' */ + /* Update for UnitDelay: '/UnitDelay4' */ rtDW->UnitDelay4_DSTATE_e = rtb_Abs5; - /* Update for UnitDelay: '/UnitDelay4' */ + /* Update for UnitDelay: '/UnitDelay2' incorporates: + * UnitDelay: '/UnitDelay6' + */ + rtDW->UnitDelay2_DSTATE_g = rtDW->UnitDelay6_DSTATE; + + /* Update for UnitDelay: '/UnitDelay4' */ rtDW->UnitDelay4_DSTATE_eu = rtb_Merge; - /* Update for UnitDelay: '/UnitDelay1' */ - rtDW->UnitDelay1_DSTATE_p = rtb_Sum_l; + /* Update for UnitDelay: '/UnitDelay5' */ + rtDW->UnitDelay5_DSTATE_l = rtb_RelationalOperator4_d; + + /* Update for UnitDelay: '/UnitDelay6' */ + rtDW->UnitDelay6_DSTATE = rtb_RelationalOperator9; /* Outport: '/DC_phaC' incorporates: - * DataTypeConversion: '/Data Type Conversion6' + * DataTypeConversion: '/Data Type Conversion6' */ - rtY->DC_phaC = (int16_T)(rtb_Merge1 >> 4); + rtY->DC_phaC = (int16_T)(rtb_Saturation1 >> 4); /* Outport: '/n_mot' incorporates: * DataTypeConversion: '/Data Type Conversion1' @@ -2708,48 +2493,42 @@ void BLDC_controller_initialize(RT_MODEL *const rtM) DW *rtDW = ((DW *) rtM->dwork); /* Start for Atomic SubSystem: '/BLDC_controller' */ - /* Start for If: '/If2' */ + /* Start for If: '/If4' */ + rtDW->If4_ActiveSubsystem = -1; + + /* Start for IfAction SubSystem: '/F03_Control_Mode_Manager' */ + /* Start for If: '/If2' */ rtDW->If2_ActiveSubsystem = -1; - /* Start for If: '/If2' */ - rtDW->If2_ActiveSubsystem_j = -1; + /* End of Start for SubSystem: '/F03_Control_Mode_Manager' */ /* Start for If: '/If1' */ rtDW->If1_ActiveSubsystem = -1; - /* Start for IfAction SubSystem: '/F04_Field_Oriented_Control' */ - /* Start for If: '/If2' */ + /* Start for IfAction SubSystem: '/F05_Field_Oriented_Control' */ + /* Start for If: '/If2' */ rtDW->If2_ActiveSubsystem_a = -1; - /* Start for If: '/If1' */ - rtDW->If1_ActiveSubsystem_e = -1; - - /* Start for If: '/If1' */ - rtDW->If1_ActiveSubsystem_f = -1; - - /* Start for If: '/If2' */ - rtDW->If2_ActiveSubsystem_c = -1; - - /* Start for SwitchCase: '/Switch Case' */ - rtDW->SwitchCase_ActiveSubsystem = -1; - - /* End of Start for SubSystem: '/F04_Field_Oriented_Control' */ + /* End of Start for SubSystem: '/F05_Field_Oriented_Control' */ /* End of Start for SubSystem: '/BLDC_controller' */ /* SystemInitialize for Atomic SubSystem: '/BLDC_controller' */ - /* InitializeConditions for UnitDelay: '/UnitDelay3' */ + /* InitializeConditions for UnitDelay: '/UnitDelay3' */ rtDW->UnitDelay3_DSTATE = rtP->z_maxCntRst; - /* SystemInitialize for IfAction SubSystem: '/Raw_Motor_Speed_Estimation' */ - /* SystemInitialize for Outport: '/z_counter' */ + /* InitializeConditions for UnitDelay: '/UnitDelay2' */ + rtDW->UnitDelay2_DSTATE_g = true; + + /* SystemInitialize for IfAction SubSystem: '/Raw_Motor_Speed_Estimation' */ + /* SystemInitialize for Outport: '/z_counter' */ rtDW->z_counterRawPrev = rtP->z_maxCntRst; - /* End of SystemInitialize for SubSystem: '/Raw_Motor_Speed_Estimation' */ + /* End of SystemInitialize for SubSystem: '/Raw_Motor_Speed_Estimation' */ - /* SystemInitialize for Atomic SubSystem: '/Counter' */ + /* SystemInitialize for Atomic SubSystem: '/Counter' */ Counter_Init(&rtDW->Counter_e, rtP->z_maxCntRst); - /* End of SystemInitialize for SubSystem: '/Counter' */ + /* End of SystemInitialize for SubSystem: '/Counter' */ /* SystemInitialize for IfAction SubSystem: '/F02_Diagnostics' */ @@ -2760,13 +2539,68 @@ void BLDC_controller_initialize(RT_MODEL *const rtM) /* End of SystemInitialize for SubSystem: '/F02_Diagnostics' */ - /* SystemInitialize for IfAction SubSystem: '/Open_Mode' */ - /* SystemInitialize for Atomic SubSystem: '/rising_edge_init' */ - /* InitializeConditions for UnitDelay: '/UnitDelay' */ + /* SystemInitialize for IfAction SubSystem: '/F03_Control_Mode_Manager' */ + /* SystemInitialize for IfAction SubSystem: '/Open_Mode' */ + /* SystemInitialize for Atomic SubSystem: '/rising_edge_init' */ + /* InitializeConditions for UnitDelay: '/UnitDelay' */ rtDW->UnitDelay_DSTATE_e = true; - /* End of SystemInitialize for SubSystem: '/rising_edge_init' */ - /* End of SystemInitialize for SubSystem: '/Open_Mode' */ + /* End of SystemInitialize for SubSystem: '/rising_edge_init' */ + /* End of SystemInitialize for SubSystem: '/Open_Mode' */ + /* End of SystemInitialize for SubSystem: '/F03_Control_Mode_Manager' */ + + /* SystemInitialize for IfAction SubSystem: '/F05_Field_Oriented_Control' */ + /* SystemInitialize for IfAction SubSystem: '/Motor_Limitations' */ + + /* SystemInitialize for IfAction SubSystem: '/Voltage_Mode_Protection' */ + + /* SystemInitialize for Atomic SubSystem: '/I_backCalc_fixdt' */ + I_backCalc_fixdt_Init(&rtDW->I_backCalc_fixdt_i, 0); + + /* End of SystemInitialize for SubSystem: '/I_backCalc_fixdt' */ + + /* SystemInitialize for Atomic SubSystem: '/I_backCalc_fixdt1' */ + I_backCalc_fixdt_Init(&rtDW->I_backCalc_fixdt1, 0); + + /* End of SystemInitialize for SubSystem: '/I_backCalc_fixdt1' */ + + /* End of SystemInitialize for SubSystem: '/Voltage_Mode_Protection' */ + + /* SystemInitialize for IfAction SubSystem: '/Torque_Mode_Protection' */ + + /* SystemInitialize for Atomic SubSystem: '/I_backCalc_fixdt' */ + I_backCalc_fixdt_Init(&rtDW->I_backCalc_fixdt_g, 0); + + /* End of SystemInitialize for SubSystem: '/I_backCalc_fixdt' */ + + /* End of SystemInitialize for SubSystem: '/Torque_Mode_Protection' */ + + /* SystemInitialize for Outport: '/Vd_max' */ + rtDW->Vd_max1 = 14400; + + /* SystemInitialize for Outport: '/Vd_min' */ + rtDW->Gain3 = -14400; + + /* SystemInitialize for Outport: '/Vq_max' */ + rtDW->Vq_max_M1 = 14400; + + /* SystemInitialize for Outport: '/Vq_min' */ + rtDW->Gain5 = -14400; + + /* SystemInitialize for Outport: '/id_max' */ + rtDW->i_max = 12000; + + /* SystemInitialize for Outport: '/id_min' */ + rtDW->Gain4_c = -12000; + + /* SystemInitialize for Outport: '/iq_max' */ + rtDW->Divide1_a = 12000; + + /* SystemInitialize for Outport: '/iq_min' */ + rtDW->Gain1 = -12000; + + /* End of SystemInitialize for SubSystem: '/Motor_Limitations' */ + /* End of SystemInitialize for SubSystem: '/F05_Field_Oriented_Control' */ /* End of SystemInitialize for SubSystem: '/BLDC_controller' */ } diff --git a/Src/BLDC_controller_data.c b/Src/BLDC_controller_data.c index 16b45f7..5a11f15 100644 --- a/Src/BLDC_controller_data.c +++ b/Src/BLDC_controller_data.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1212 + * Model version : 1.1249 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Sat Nov 30 08:54:28 2019 + * C/C++ source code generated on : Thu Dec 12 20:22:31 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex @@ -22,7 +22,7 @@ /* Constant parameters (auto storage) */ const ConstP rtConstP = { /* Computed Parameter: r_sin3PhaA_M1_Table - * Referenced by: '/r_sin3PhaA_M1' + * Referenced by: '/r_sin3PhaA_M1' */ { -13091, -13634, -14126, -14565, -14953, -15289, -15577, -15816, -16009, -16159, -16269, -16340, -16377, -16383, -16362, -16317, -16253, -16172, @@ -44,7 +44,7 @@ const ConstP rtConstP = { -9623, -10411, -11154, -11849, -12496, -13091 }, /* Computed Parameter: r_sin3PhaB_M1_Table - * Referenced by: '/r_sin3PhaB_M1' + * Referenced by: '/r_sin3PhaB_M1' */ { 15172, 15180, 15206, 15248, 15306, 15377, 15461, 15555, 15656, 15762, 15870, 15977, 16079, 16172, 16253, 16317, 16362, 16383, 16377, 16340, 16269, 16159, @@ -66,7 +66,7 @@ const ConstP rtConstP = { 15377, 15306, 15248, 15206, 15180, 15172 }, /* Computed Parameter: r_sin3PhaC_M1_Table - * Referenced by: '/r_sin3PhaC_M1' + * Referenced by: '/r_sin3PhaC_M1' */ { -13091, -12496, -11849, -11154, -10411, -9623, -8791, -7921, -7014, -6075, -5107, -4115, -3104, -2077, -1041, 0, 1041, 2077, 3104, 4115, 5107, 6075, @@ -88,7 +88,7 @@ const ConstP rtConstP = { -15289, -14953, -14565, -14126, -13634, -13091 }, /* Computed Parameter: r_sin_M1_Table - * Referenced by: '/r_sin_M1' + * Referenced by: '/r_sin_M1' */ { 8192, 8682, 9162, 9630, 10087, 10531, 10963, 11381, 11786, 12176, 12551, 12911, 13255, 13583, 13894, 14189, 14466, 14726, 14968, 15191, 15396, 15582, @@ -109,7 +109,7 @@ const ConstP rtConstP = { 2280, 2845, 3406, 3964, 4516, 5063, 5604, 6138, 6664, 7182, 7692, 8192 }, /* Computed Parameter: r_cos_M1_Table - * Referenced by: '/r_cos_M1' + * Referenced by: '/r_cos_M1' */ { 14189, 13894, 13583, 13255, 12911, 12551, 12176, 11786, 11381, 10963, 10531, 10087, 9630, 9162, 8682, 8192, 7692, 7182, 6664, 6138, 5604, 5063, 4516, @@ -130,7 +130,7 @@ const ConstP rtConstP = { 16026, 15897, 15749, 15582, 15396, 15191, 14968, 14726, 14466, 14189 }, /* Computed Parameter: iq_maxSca_M1_Table - * Referenced by: '/iq_maxSca_M1' + * Referenced by: '/iq_maxSca_M1' */ { 65535U, 65523U, 65484U, 65418U, 65326U, 65207U, 65062U, 64890U, 64691U, 64465U, 64211U, 63930U, 63620U, 63281U, 62913U, 62516U, 62088U, 61630U, @@ -140,66 +140,66 @@ const ConstP rtConstP = { 28540U, 25655U, 22323U, 18304U, 12974U }, /* Computed Parameter: z_commutMap_M1_table - * Referenced by: '/z_commutMap_M1' + * Referenced by: '/z_commutMap_M1' */ { -1, 1, 0, -1, 0, 1, 0, -1, 1, 1, -1, 0, 1, 0, -1, 0, 1, -1 }, /* Computed Parameter: vec_hallToPos_Value - * Referenced by: '/vec_hallToPos' + * Referenced by: '/vec_hallToPos' */ { 0, 2, 0, 1, 4, 3, 5, 0 } }; P rtP_Left = { /* Variable: dV_openRate - * Referenced by: '/dV_openRate' + * Referenced by: '/dV_openRate' */ - 4096, + 12288, /* Variable: dz_cntTrnsDetHi - * Referenced by: '/dz_cntTrnsDet' + * Referenced by: '/dz_cntTrnsDet' */ 40, /* Variable: dz_cntTrnsDetLo - * Referenced by: '/dz_cntTrnsDet' + * Referenced by: '/dz_cntTrnsDet' */ 20, /* Variable: z_maxCntRst * Referenced by: - * '/Counter' - * '/z_maxCntRst' - * '/z_maxCntRst2' - * '/UnitDelay3' - * '/z_counter' + * '/Counter' + * '/z_maxCntRst' + * '/z_maxCntRst2' + * '/UnitDelay3' + * '/z_counter' */ 2000, /* Variable: cf_speedCoef - * Referenced by: '/cf_speedCoef' + * Referenced by: '/cf_speedCoef' */ 10667U, /* Variable: t_errDequal * Referenced by: '/t_errDequal' */ - 32000U, + 10667U, /* Variable: t_errQual * Referenced by: '/t_errQual' */ - 9600U, + 3200U, /* Variable: Vd_max * Referenced by: - * '/Vd_max1' - * '/Vd_max' + * '/Vd_max1' + * '/Vd_max' */ 14400, /* Variable: Vq_max_M1 - * Referenced by: '/Vq_max_M1' + * Referenced by: '/Vq_max_M1' */ { 14400, 14396, 14386, 14368, 14343, 14311, 14271, 14225, 14171, 14109, 14040, 13963, 13879, 13786, 13685, 13576, 13459, 13333, 13198, 13053, 12900, 12736, @@ -207,58 +207,59 @@ P rtP_Left = { 9790, 9433, 9051, 8640, 8196, 7713, 7184, 6597, 5935, 5170, 4245, 3019, 0 }, /* Variable: Vq_max_XA - * Referenced by: '/Vq_max_XA' + * Referenced by: '/Vq_max_XA' */ { 0, 320, 640, 960, 1280, 1600, 1920, 2240, 2560, 2880, 3200, 3520, 3840, 4160, 4480, 4800, 5120, 5440, 5760, 6080, 6400, 6720, 7040, 7360, 7680, 8000, 8320, 8640, 8960, 9280, 9600, 9920, 10240, 10560, 10880, 11200, 11520, 11840, 12160, 12480, 12800, 13120, 13440, 13760, 14080, 14400 }, + /* Variable: a_phaAdvMax + * Referenced by: '/a_phaAdvMax' + */ + 400, + /* Variable: i_max * Referenced by: - * '/i_max' - * '/i_max' + * '/i_max' + * '/i_max' */ 12000, - /* Variable: id_fieldWeak_M1 - * Referenced by: '/id_fieldWeak_M1' + /* Variable: id_fieldWeakMax + * Referenced by: '/id_fieldWeakMax' */ - { 0, 80, 240, 560, 1040, 1680, 2400, 3040, 3520, 3840, 4000, 4000 }, + 4000, /* Variable: n_commAcvLo - * Referenced by: '/n_commDeacv' + * Referenced by: '/n_commDeacv' */ 240, /* Variable: n_commDeacvHi - * Referenced by: '/n_commDeacv' + * Referenced by: '/n_commDeacv' */ 480, /* Variable: n_fieldWeakAuthHi - * Referenced by: - * '/n_fieldWeakAuth' - * '/n_fieldWeakAuth' + * Referenced by: '/n_fieldWeakAuthHi' */ - 3200, + 6400, /* Variable: n_fieldWeakAuthLo - * Referenced by: - * '/n_fieldWeakAuth' - * '/n_fieldWeakAuth' + * Referenced by: '/n_fieldWeakAuthLo' */ - 2240, + 4800, /* Variable: n_max * Referenced by: - * '/n_max1' - * '/n_max' + * '/n_max1' + * '/n_max' */ - 12800, + 16000, /* Variable: n_stdStillDet - * Referenced by: '/n_stdStillDet' + * Referenced by: '/n_stdStillDet' */ 48, @@ -267,71 +268,71 @@ P rtP_Left = { */ 6400, - /* Variable: r_fieldWeak_XA - * Referenced by: '/r_fieldWeak_XA' + /* Variable: r_fieldWeakHi + * Referenced by: '/r_fieldWeakHi' */ - { 9120, 9600, 10080, 10560, 11040, 11520, 12000, 12480, 12960, 13440, 13920, - 14400 }, + 24000, - /* Variable: r_phaAdv_XA - * Referenced by: '/r_phaAdv_XA' + /* Variable: r_fieldWeakLo + * Referenced by: '/r_fieldWeakLo' */ - { 0, 1600, 3200, 4800, 6400, 8000, 9600, 11200, 12800, 14400, 16000 }, + 16000, + + /* Variable: cf_KbLimProt + * Referenced by: + * '/cf_KbLimProt' + * '/cf_KbLimProt' + */ + 768U, /* Variable: cf_idKp - * Referenced by: '/cf_idKp1' + * Referenced by: '/cf_idKp1' */ 819U, /* Variable: cf_iqKp - * Referenced by: '/cf_iqKp' + * Referenced by: '/cf_iqKp' */ - 2048U, + 1229U, /* Variable: cf_nKp - * Referenced by: '/cf_nKp' + * Referenced by: '/cf_nKp' */ 4833U, /* Variable: cf_currFilt - * Referenced by: '/cf_currFilt' + * Referenced by: '/cf_currFilt' */ 7864U, /* Variable: cf_idKi - * Referenced by: '/cf_idKi1' + * Referenced by: '/cf_idKi1' */ - 246U, + 737U, /* Variable: cf_iqKi - * Referenced by: '/cf_iqKi' + * Referenced by: '/cf_iqKi' */ - 410U, + 1229U, /* Variable: cf_iqKiLimProt - * Referenced by: '/cf_iqKiLimProt' + * Referenced by: + * '/cf_iqKiLimProt' + * '/cf_iqKiLimProt' */ - 167U, + 737U, /* Variable: cf_nKi - * Referenced by: '/cf_nKi' + * Referenced by: '/cf_nKi' */ - 84U, + 251U, - /* Variable: cf_iqKpLimProt - * Referenced by: '/cf_iqKpLimProt' + /* Variable: cf_nKiLimProt + * Referenced by: + * '/cf_nKiLimProt' + * '/cf_nKiLimProt' */ - 1843U, - - /* Variable: cf_nKpLimProt - * Referenced by: '/cf_nKpLimProt' - */ - 1280U, - - /* Variable: a_phaAdv_M1 - * Referenced by: '/a_phaAdv_M1' - */ - { 0, 0, 0, 0, 0, 512, 768, 1280, 2304, 4096, 6400 }, + 246U, /* Variable: z_ctrlTypSel * Referenced by: '/z_ctrlTypSel1' @@ -345,13 +346,13 @@ P rtP_Left = { /* Variable: b_fieldWeakEna * Referenced by: - * '/b_fieldWeakEna' - * '/b_fieldWeakEna' + * '/b_fieldWeakEna' + * '/b_fieldWeakEna' */ 0, /* Variable: b_selPhaABCurrMeas - * Referenced by: '/b_selPhaABCurrMeas' + * Referenced by: '/b_selPhaABCurrMeas' */ 1 }; /* Modifiable parameters */ diff --git a/Src/bldc.c b/Src/bldc.c index a375260..a2ec2ce 100644 --- a/Src/bldc.c +++ b/Src/bldc.c @@ -47,6 +47,7 @@ extern ExtY rtY_Right; /* External outputs */ static int16_t pwm_margin = 100; /* This margin allows to always have a window in the PWM signal for proper Phase currents measurement */ extern uint8_t ctrlModReq; +static int16_t curDC_max = (I_DC_MAX * A2BIT_CONV); int16_t curL_phaA = 0, curL_phaB = 0, curL_DC = 0; int16_t curR_phaB = 0, curR_phaC = 0, curR_DC = 0; uint8_t errCode_Left = 0; @@ -116,13 +117,13 @@ void DMA1_Channel1_IRQHandler(void) { // Disable PWM when current limit is reached (current chopping) // This is the Level 2 of current protection. The Level 1 should kick in first given by I_MOT_MAX - if(ABS(curL_DC) > I_DC_MAX || timeout > TIMEOUT || enable == 0) { + if(ABS(curL_DC) > curDC_max || timeout > TIMEOUT || enable == 0) { LEFT_TIM->BDTR &= ~TIM_BDTR_MOE; } else { LEFT_TIM->BDTR |= TIM_BDTR_MOE; } - if(ABS(curR_DC) > I_DC_MAX || timeout > TIMEOUT || enable == 0) { + if(ABS(curR_DC) > curDC_max || timeout > TIMEOUT || enable == 0) { RIGHT_TIM->BDTR &= ~TIM_BDTR_MOE; } else { RIGHT_TIM->BDTR |= TIM_BDTR_MOE; diff --git a/Src/main.c b/Src/main.c index 368b7d5..4b6de47 100644 --- a/Src/main.c +++ b/Src/main.c @@ -35,18 +35,18 @@ RT_MODEL rtM_Left_; /* Real-time model */ RT_MODEL rtM_Right_; /* Real-time model */ -RT_MODEL *const rtM_Left = &rtM_Left_; -RT_MODEL *const rtM_Right = &rtM_Right_; +RT_MODEL *const rtM_Left = &rtM_Left_; +RT_MODEL *const rtM_Right = &rtM_Right_; -P rtP_Left; /* Block parameters (auto storage) */ -DW rtDW_Left; /* Observable states */ -ExtU rtU_Left; /* External inputs */ -ExtY rtY_Left; /* External outputs */ +P rtP_Left; /* Block parameters (auto storage) */ +DW rtDW_Left; /* Observable states */ +ExtU rtU_Left; /* External inputs */ +ExtY rtY_Left; /* External outputs */ -P rtP_Right; /* Block parameters (auto storage) */ -DW rtDW_Right; /* Observable states */ -ExtU rtU_Right; /* External inputs */ -ExtY rtY_Right; /* External outputs */ +P rtP_Right; /* Block parameters (auto storage) */ +DW rtDW_Right; /* Observable states */ +ExtU rtU_Right; /* External inputs */ +ExtY rtY_Right; /* External outputs */ extern uint8_t errCode_Left; /* Global variable to handle Motor error codes */ extern uint8_t errCode_Right; /* Global variable to handle Motor error codes */ @@ -99,27 +99,27 @@ static uint8_t serialSendCounter; // serial send counter static uint8_t button1, button2; #endif -uint8_t ctrlModReqRaw = CTRL_MOD_REQ; -uint8_t ctrlModReq; // Final control mode request -static int cmd1; // normalized input value. -1000 to 1000 -static int cmd2; // normalized input value. -1000 to 1000 -static int16_t steer; // local variable for steering. -1000 to 1000 -static int16_t speed; // local variable for speed. -1000 to 1000 -static int16_t steerFixdt; // local fixed-point variable for steering low-pass filter -static int16_t speedFixdt; // local fixed-point variable for speed low-pass filter -static int16_t steerRateFixdt; // local fixed-point variable for steering rate limiter -static int16_t speedRateFixdt; // local fixed-point variable for speed rate limiter +uint8_t ctrlModReqRaw = CTRL_MOD_REQ; +uint8_t ctrlModReq = CTRL_MOD_REQ; // Final control mode request +static int cmd1; // normalized input value. -1000 to 1000 +static int cmd2; // normalized input value. -1000 to 1000 +static int16_t steer; // local variable for steering. -1000 to 1000 +static int16_t speed; // local variable for speed. -1000 to 1000 +static int16_t steerFixdt; // local fixed-point variable for steering low-pass filter +static int16_t speedFixdt; // local fixed-point variable for speed low-pass filter +static int16_t steerRateFixdt; // local fixed-point variable for steering rate limiter +static int16_t speedRateFixdt; // local fixed-point variable for speed rate limiter -extern volatile int pwml; // global variable for pwm left. -1000 to 1000 -extern volatile int pwmr; // global variable for pwm right. -1000 to 1000 +extern volatile int pwml; // global variable for pwm left. -1000 to 1000 +extern volatile int pwmr; // global variable for pwm right. -1000 to 1000 -extern uint8_t buzzerFreq; // global variable for the buzzer pitch. can be 1, 2, 3, 4, 5, 6, 7... -extern uint8_t buzzerPattern; // global variable for the buzzer pattern. can be 1, 2, 3, 4, 5, 6, 7... +extern uint8_t buzzerFreq; // global variable for the buzzer pitch. can be 1, 2, 3, 4, 5, 6, 7... +extern uint8_t buzzerPattern; // global variable for the buzzer pattern. can be 1, 2, 3, 4, 5, 6, 7... -extern uint8_t enable; // global variable for motor enable +extern uint8_t enable; // global variable for motor enable -extern volatile uint32_t timeout; // global variable for timeout -extern int16_t batVoltage; // global variable for battery voltage +extern volatile uint32_t timeout; // global variable for timeout +extern int16_t batVoltage; // global variable for battery voltage static uint32_t inactivity_timeout_counter; @@ -187,16 +187,24 @@ int main(void) { rtP_Left.b_selPhaABCurrMeas = 1; // Left motor measured current phases = {iA, iB} -> do NOT change rtP_Left.z_ctrlTypSel = CTRL_TYP_SEL; rtP_Left.b_diagEna = DIAG_ENA; + rtP_Left.i_max = (I_MOT_MAX * A2BIT_CONV) << 4; // fixdt(1,16,4) + rtP_Left.n_max = N_MOT_MAX << 4; // fixdt(1,16,4) rtP_Left.b_fieldWeakEna = FIELD_WEAK_ENA; - rtP_Left.i_max = I_MOT_MAX; - rtP_Left.n_max = N_MOT_MAX; + rtP_Left.id_fieldWeakMax = (FIELD_WEAK_MAX * A2BIT_CONV) << 4; // fixdt(1,16,4) + rtP_Left.a_phaAdvMax = PHASE_ADV_MAX << 4; // fixdt(1,16,4) + rtP_Left.r_fieldWeakHi = FIELD_WEAK_HI << 4; // fixdt(1,16,4) + rtP_Left.r_fieldWeakLo = FIELD_WEAK_LO << 4; // fixdt(1,16,4) rtP_Right.b_selPhaABCurrMeas = 0; // Left motor measured current phases = {iB, iC} -> do NOT change rtP_Right.z_ctrlTypSel = CTRL_TYP_SEL; rtP_Right.b_diagEna = DIAG_ENA; + rtP_Right.i_max = (I_MOT_MAX * A2BIT_CONV) << 4; // fixdt(1,16,4) + rtP_Right.n_max = N_MOT_MAX << 4; // fixdt(1,16,4) rtP_Right.b_fieldWeakEna = FIELD_WEAK_ENA; - rtP_Right.i_max = I_MOT_MAX; - rtP_Right.n_max = N_MOT_MAX; + rtP_Right.id_fieldWeakMax = (FIELD_WEAK_MAX * A2BIT_CONV) << 4; // fixdt(1,16,4) + rtP_Right.a_phaAdvMax = PHASE_ADV_MAX << 4; // fixdt(1,16,4) + rtP_Right.r_fieldWeakHi = FIELD_WEAK_HI << 4; // fixdt(1,16,4) + rtP_Right.r_fieldWeakLo = FIELD_WEAK_LO << 4; // fixdt(1,16,4) /* Pack LEFT motor data into RTM */ rtM_Left->defaultParam = &rtP_Left; @@ -282,34 +290,34 @@ int main(void) { #ifdef CONTROL_NUNCHUCK Nunchuck_Read(); - cmd1 = CLAMP((nunchuck_data[0] - 127) * 8, -1000, 1000); // x - axis. Nunchuck joystick readings range 30 - 230 - cmd2 = CLAMP((nunchuck_data[1] - 128) * 8, -1000, 1000); // y - axis + cmd1 = CLAMP((nunchuck_data[0] - 127) * 8, INPUT_MIN, INPUT_MAX); // x - axis. Nunchuck joystick readings range 30 - 230 + cmd2 = CLAMP((nunchuck_data[1] - 128) * 8, INPUT_MIN, INPUT_MAX); // y - axis button1 = (uint8_t)nunchuck_data[5] & 1; button2 = (uint8_t)(nunchuck_data[5] >> 1) & 1; #endif #ifdef CONTROL_PPM - cmd1 = CLAMP((ppm_captured_value[0] - 500) * 2, -1000, 1000); - cmd2 = CLAMP((ppm_captured_value[1] - 500) * 2, -1000, 1000); - button1 = ppm_captured_value[5] > 500; + cmd1 = CLAMP((ppm_captured_value[0] - INPUT_MID) * 2, INPUT_MIN, INPUT_MAX); + cmd2 = CLAMP((ppm_captured_value[1] - INPUT_MID) * 2, INPUT_MIN, INPUT_MAX); + button1 = ppm_captured_value[5] > INPUT_MID; float scale = ppm_captured_value[2] / 1000.0f; #endif #ifdef CONTROL_ADC // ADC values range: 0-4095, see ADC-calibration in config.h #ifdef ADC1_MID_POT - cmd1 = CLAMP((adc_buffer.l_tx2 - ADC1_MID) * 1000 / (ADC1_MAX - ADC1_MID), 0, 1000) - -CLAMP((ADC1_MID - adc_buffer.l_tx2) * 1000 / (ADC1_MID - ADC1_MIN), 0, 1000); // ADC1 + cmd1 = CLAMP((adc_buffer.l_tx2 - ADC1_MID) * INPUT_MAX / (ADC1_MAX - ADC1_MID), 0, INPUT_MAX) + -CLAMP((ADC1_MID - adc_buffer.l_tx2) * INPUT_MAX / (ADC1_MID - ADC1_MIN), 0, INPUT_MAX); // ADC1 #else - cmd1 = CLAMP((adc_buffer.l_tx2 - ADC1_MIN) * 1000 / (ADC1_MAX - ADC1_MIN), 0, 1000); // ADC1 + cmd1 = CLAMP((adc_buffer.l_tx2 - ADC1_MIN) * INPUT_MAX / (ADC1_MAX - ADC1_MIN), 0, INPUT_MAX); // ADC1 #endif #ifdef ADC2_MID_POT - cmd2 = CLAMP((adc_buffer.l_rx2 - ADC2_MID) * 1000 / (ADC2_MAX - ADC2_MID), 0, 1000) - -CLAMP((ADC2_MID - adc_buffer.l_rx2) * 1000 / (ADC2_MID - ADC2_MIN), 0, 1000); // ADC2 + cmd2 = CLAMP((adc_buffer.l_rx2 - ADC2_MID) * INPUT_MAX / (ADC2_MAX - ADC2_MID), 0, INPUT_MAX) + -CLAMP((ADC2_MID - adc_buffer.l_rx2) * INPUT_MAX / (ADC2_MID - ADC2_MIN), 0, INPUT_MAX); // ADC2 #else - cmd2 = CLAMP((adc_buffer.l_rx2 - ADC2_MIN) * 1000 / (ADC2_MAX - ADC2_MIN), 0, 1000); // ADC2 + cmd2 = CLAMP((adc_buffer.l_rx2 - ADC2_MIN) * INPUT_MAX / (ADC2_MAX - ADC2_MIN), 0, INPUT_MAX); // ADC2 #endif // use ADCs as button inputs: @@ -327,8 +335,8 @@ int main(void) { if (timeoutCnt-- <= 0) // Timeout de-qualification timeoutFlag = 0; // Timeout flag cleared } else { - cmd1 = CLAMP((int16_t)command.steer, -1000, 1000); - cmd2 = CLAMP((int16_t)command.speed, -1000, 1000); + cmd1 = CLAMP((int16_t)command.steer, INPUT_MIN, INPUT_MAX); + cmd2 = CLAMP((int16_t)command.speed, INPUT_MIN, INPUT_MAX); command.start = 0xFFFF; // Change the Start Frame for timeout detection in the next cycle timeoutCnt = 0; // Reset the timeout counter } @@ -620,12 +628,12 @@ void mixerFcn(int16_t rtu_speed, int16_t rtu_steer, int16_t *rty_speedR, int16_t tmp = prodSpeed - prodSteer; tmp = CLAMP(tmp, -32768, 32767); // Overflow protection *rty_speedR = (int16_t)(tmp >> 4); // Convert from fixed-point to int - *rty_speedR = CLAMP(*rty_speedR, -1000, 1000); + *rty_speedR = CLAMP(*rty_speedR, INPUT_MIN, INPUT_MAX); tmp = prodSpeed + prodSteer; tmp = CLAMP(tmp, -32768, 32767); // Overflow protection *rty_speedL = (int16_t)(tmp >> 4); // Convert from fixed-point to int - *rty_speedL = CLAMP(*rty_speedL, -1000, 1000); + *rty_speedL = CLAMP(*rty_speedL, INPUT_MIN, INPUT_MAX); } // =========================================================== diff --git a/build/firmware.bin b/build/firmware.bin index 58f8369..ce60259 100644 Binary files a/build/firmware.bin and b/build/firmware.bin differ diff --git a/build/firmware.elf b/build/firmware.elf index f26bded..6a0344c 100644 Binary files a/build/firmware.elf and b/build/firmware.elf differ diff --git a/docs/firmware_architecture.pptx b/docs/firmware_architecture.pptx index c750093..9f5d105 100644 Binary files a/docs/firmware_architecture.pptx and b/docs/firmware_architecture.pptx differ diff --git a/docs/pictures/FOC_algorithm.png b/docs/pictures/FOC_algorithm.png index d9ef13b..259b2cc 100644 Binary files a/docs/pictures/FOC_algorithm.png and b/docs/pictures/FOC_algorithm.png differ diff --git a/docs/pictures/FW_architecture.png b/docs/pictures/FW_architecture.png index a29aa7e..34e3f7d 100644 Binary files a/docs/pictures/FW_architecture.png and b/docs/pictures/FW_architecture.png differ diff --git a/docs/pictures/FieldWeakening.png b/docs/pictures/FieldWeakening.png new file mode 100644 index 0000000..562c90f Binary files /dev/null and b/docs/pictures/FieldWeakening.png differ diff --git a/docs/pictures/paramTable.png b/docs/pictures/paramTable.png index 8ac96f6..fffaa74 100644 Binary files a/docs/pictures/paramTable.png and b/docs/pictures/paramTable.png differ