diff --git a/01_Matlab/03_CreateParamTable/tableParamType.xlsx b/01_Matlab/03_CreateParamTable/tableParamType.xlsx index 919cbbe..466781f 100644 Binary files a/01_Matlab/03_CreateParamTable/tableParamType.xlsx and b/01_Matlab/03_CreateParamTable/tableParamType.xlsx differ diff --git a/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx b/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx index efcee1b..95cd909 100644 Binary files a/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx and b/01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx differ diff --git a/01_Matlab/init_model.m b/01_Matlab/init_model.m index 5f14239..183ff24 100644 --- a/01_Matlab/init_model.m +++ b/01_Matlab/init_model.m @@ -138,10 +138,11 @@ cf_iqKpLimProt = 7.2; % [-] Current limit protection gain (onl cf_iqKiLimProt = 40.7 / f_ctrl; % [-] Current limit protection integral gain (only used in SPD_MODE) i_max = 15; % [A] Maximum allowed motor current (continuous) i_max = i_max * i_sca; -iq_max_XA = 0:15:i_max; -iq_max_M1 = sqrt(i_max^2 - iq_max_XA.^2); % Current circle limitations map +iq_maxSca_XA = 0:0.02:0.99; +iq_maxSca_XA = fixpt_evenspace_cleanup(iq_maxSca_XA, ufix(16), 2^-16); % Make sure the data is evely spaced up to the last bit +iq_maxSca_M1 = sqrt(1 - iq_maxSca_XA.^2); % Current circle limitations map % figure -% stairs(iq_max_XA, iq_max_M1); legend('i_{max}'); +% stairs(iq_maxSca_XA, iq_maxSca_M1); legend('i_{maxSca}'); %------------------------------- %% F05_Control_Type_Management diff --git a/Inc/BLDC_controller.h b/Inc/BLDC_controller.h index 350bcd1..6583d08 100644 --- a/Inc/BLDC_controller.h +++ b/Inc/BLDC_controller.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1197 + * Model version : 1.1199 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Thu Oct 31 21:29:42 2019 + * C/C++ source code generated on : Sun Nov 3 12:28:16 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex @@ -139,6 +139,11 @@ typedef struct { */ int16_T r_cos_M1_Table[181]; + /* Computed Parameter: iq_maxSca_M1_Table + * Referenced by: '/iq_maxSca_M1' + */ + uint16_T iq_maxSca_M1_Table[50]; + /* Computed Parameter: vec_hallToPos_Value * Referenced by: '/vec_hallToPos' */ @@ -229,12 +234,6 @@ struct P_ { int16_T id_fieldWeak_M1[12]; /* Variable: id_fieldWeak_M1 * Referenced by: '/id_fieldWeak_M1' */ - int16_T iq_max_M1[51]; /* Variable: iq_max_M1 - * Referenced by: '/iq_max_M1' - */ - int16_T iq_max_XA[51]; /* Variable: iq_max_XA - * Referenced by: '/iq_max_XA' - */ int16_T n_commAcvLo; /* Variable: n_commAcvLo * Referenced by: '/n_commDeacv' */ diff --git a/Src/BLDC_controller.c b/Src/BLDC_controller.c index ce21dcd..ba768e5 100644 --- a/Src/BLDC_controller.c +++ b/Src/BLDC_controller.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1197 + * Model version : 1.1199 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Thu Oct 31 21:29:42 2019 + * C/C++ source code generated on : Sun Nov 3 12:28:16 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex @@ -856,11 +856,11 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Inport: '/r_inpTgt' */ if (rtb_Gain3 >= 16000) { - rtb_Gain4 = 16000; + rtb_toNegative = 16000; } else if (rtb_Gain3 <= -16000) { - rtb_Gain4 = -16000; + rtb_toNegative = -16000; } else { - rtb_Gain4 = (int16_T)(rtU->r_inpTgt << 4); + rtb_toNegative = (int16_T)(rtU->r_inpTgt << 4); } /* Outputs for IfAction SubSystem: '/FOC_Control_Type' incorporates: @@ -872,7 +872,7 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Selector: '/Selector' */ rtb_Merge = (int16_T)(((uint16_T)((tmp[rtU->z_ctrlModReq] << 5) / 125) * - rtb_Gain4) >> 12); + rtb_toNegative) >> 12); /* End of Outputs for SubSystem: '/FOC_Control_Type' */ } else if (rtb_Gain3 >= 16000) { @@ -1199,15 +1199,15 @@ void BLDC_controller_step(RT_MODEL *const rtM) /* Abs: '/Abs4' incorporates: * UnitDelay: '/UnitDelay4' */ - rtb_Gain4 = (int16_T)-rtDW->UnitDelay4_DSTATE; + rtb_toNegative = (int16_T)-rtDW->UnitDelay4_DSTATE; } else { /* Abs: '/Abs4' incorporates: * UnitDelay: '/UnitDelay4' */ - rtb_Gain4 = rtDW->UnitDelay4_DSTATE; + rtb_toNegative = rtDW->UnitDelay4_DSTATE; } - rtb_RelationalOperator1_m = ((rtb_Gain4 > rtP->r_errInpTgtThres) && + rtb_RelationalOperator1_m = ((rtb_toNegative > rtP->r_errInpTgtThres) && rtb_RelationalOperator4_d); } @@ -1830,43 +1830,49 @@ void BLDC_controller_step(RT_MODEL *const rtM) /* Abs: '/Abs5' */ if (rtDW->Switch1 < 0) { - rtb_Gain4 = (int16_T)-rtDW->Switch1; + rtb_toNegative = (int16_T)-rtDW->Switch1; } else { - rtb_Gain4 = rtDW->Switch1; + rtb_toNegative = rtDW->Switch1; } /* End of Abs: '/Abs5' */ /* PreLookup: '/Vq_max_XA' */ - rtb_r_fieldWeak_XA_o1 = plook_u8s16_evencka(rtb_Gain4, rtP->Vq_max_XA[0], + rtb_r_fieldWeak_XA_o1 = plook_u8s16_evencka(rtb_toNegative, rtP->Vq_max_XA[0], (uint16_T)(rtP->Vq_max_XA[1] - rtP->Vq_max_XA[0]), 45U); - /* Interpolation_n-D: '/Vq_max_M1' */ - rtb_Gain2_f = rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]; - /* Gain: '/Gain5' incorporates: * Interpolation_n-D: '/Vq_max_M1' */ - rtb_Saturation = (int16_T)-rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]; + rtb_Gain2_f = (int16_T)-rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]; - /* PreLookup: '/iq_max_XA' */ - rtb_r_fieldWeak_XA_o1 = plook_u8s16_evencka(rtb_id_fieldWeak_M1, - rtP->iq_max_XA[0], (uint16_T)(rtP->iq_max_XA[1] - rtP->iq_max_XA[0]), 50U); - - /* MinMax: '/MinMax' incorporates: + /* Interpolation_n-D: '/iq_maxSca_M1' incorporates: * Constant: '/i_max' - * Interpolation_n-D: '/iq_max_M1' + * Product: '/Divide4' */ - if (rtP->i_max < rtP->iq_max_M1[rtb_r_fieldWeak_XA_o1]) { - rtb_id_fieldWeak_M1 = rtP->i_max; + rtb_Gain3 = rtb_id_fieldWeak_M1 << 16; + rtb_Gain3 = (rtb_Gain3 == MIN_int32_T) && (rtP->i_max == -1) ? MAX_int32_T : + rtb_Gain3 / rtP->i_max; + if (rtb_Gain3 < 0) { + rtb_Gain3 = 0; } else { - rtb_id_fieldWeak_M1 = rtP->iq_max_M1[rtb_r_fieldWeak_XA_o1]; + if (rtb_Gain3 > 65535) { + rtb_Gain3 = 65535; + } } - /* End of MinMax: '/MinMax' */ + /* Product: '/Divide1' incorporates: + * Constant: '/i_max' + * Interpolation_n-D: '/iq_maxSca_M1' + * PreLookup: '/iq_maxSca_XA' + * Product: '/Divide4' + */ + rtb_id_fieldWeak_M1 = (int16_T) + ((rtConstP.iq_maxSca_M1_Table[plook_u8u16_evencka((uint16_T)rtb_Gain3, 0U, + 1311U, 49U)] * rtP->i_max) >> 16); /* Gain: '/Gain1' */ - rtb_toNegative = (int16_T)-rtb_id_fieldWeak_M1; + rtb_Saturation = (int16_T)-rtb_id_fieldWeak_M1; /* If: '/If1' incorporates: * Constant: '/CTRL_COMM' @@ -1897,12 +1903,12 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Switch: '/Switch' */ if (rtDW->Sum1[0] > rtb_id_fieldWeak_M1) { - rtb_Gain4 = rtb_id_fieldWeak_M1; - } else if (rtDW->Sum1[0] < rtb_toNegative) { + rtb_toNegative = rtb_id_fieldWeak_M1; + } else if (rtDW->Sum1[0] < rtb_Saturation) { /* Switch: '/Switch' */ - rtb_Gain4 = rtb_toNegative; + rtb_toNegative = rtb_Saturation; } else { - rtb_Gain4 = rtDW->Sum1[0]; + rtb_toNegative = rtDW->Sum1[0]; } /* End of Switch: '/Switch2' */ @@ -1911,8 +1917,8 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Constant: '/cf_iqKpLimProt' * Sum: '/Sum3' */ - rtb_Gain3 = ((int16_T)(rtb_Gain4 - rtDW->Sum1[0]) * rtP->cf_iqKpLimProt) >> - 8; + rtb_Gain3 = ((int16_T)(rtb_toNegative - rtDW->Sum1[0]) * + rtP->cf_iqKpLimProt) >> 8; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -1932,7 +1938,7 @@ void BLDC_controller_step(RT_MODEL *const rtM) /* Gain: '/Gain6' incorporates: * Constant: '/n_max1' */ - rtb_Gain4 = (int16_T)-rtP->n_max; + rtb_toNegative = (int16_T)-rtP->n_max; /* If: '/If2' incorporates: * Constant: '/CTRL_COMM2' @@ -1964,10 +1970,10 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Switch: '/Switch' */ if (rtb_Switch2_fv > rtP->n_max) { - rtb_Gain4 = rtP->n_max; + rtb_toNegative = rtP->n_max; } else { - if (!(rtb_Switch2_fv < rtb_Gain4)) { - rtb_Gain4 = rtb_Switch2_fv; + if (!(rtb_Switch2_fv < rtb_toNegative)) { + rtb_toNegative = rtb_Switch2_fv; } } @@ -1977,8 +1983,8 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Constant: '/cf_nKpLimProt' * Sum: '/Sum1' */ - rtb_Gain3 = ((int16_T)(rtb_Gain4 - rtb_Switch2_fv) * rtP->cf_nKpLimProt) >> - 8; + rtb_Gain3 = ((int16_T)(rtb_toNegative - rtb_Switch2_fv) * + rtP->cf_nKpLimProt) >> 8; if (rtb_Gain3 > 32767) { rtb_Gain3 = 32767; } else { @@ -1999,6 +2005,7 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Constant: '/cf_iqKiLimProt' * Constant: '/cf_nKi' * Constant: '/cf_nKp' + * Interpolation_n-D: '/Vq_max_M1' * Product: '/Divide1' * SignalConversion: '/Signal Conversion2' * Sum: '/Sum3' @@ -2039,19 +2046,20 @@ void BLDC_controller_step(RT_MODEL *const rtM) } /* Switch: '/Switch2' incorporates: + * Interpolation_n-D: '/Vq_max_M1' * RelationalOperator: '/LowerRelop1' * RelationalOperator: '/UpperRelop' * Sum: '/Sum3' * Switch: '/Switch' */ - if ((int16_T)rtb_Gain3 > rtb_Gain2_f) { + if ((int16_T)rtb_Gain3 > rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]) { /* SignalConversion: '/Signal Conversion2' */ - rtDW->Merge = rtb_Gain2_f; - } else if ((int16_T)rtb_Gain3 < rtb_Saturation) { + rtDW->Merge = rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1]; + } else if ((int16_T)rtb_Gain3 < rtb_Gain2_f) { /* Switch: '/Switch' incorporates: * SignalConversion: '/Signal Conversion2' */ - rtDW->Merge = rtb_Saturation; + rtDW->Merge = rtb_Gain2_f; } else { /* SignalConversion: '/Signal Conversion2' */ rtDW->Merge = (int16_T)rtb_Gain3; @@ -2092,8 +2100,9 @@ void BLDC_controller_step(RT_MODEL *const rtM) /* Outputs for Atomic SubSystem: '/PI_clamp_fixdt_n' */ rtDW->Merge = (int16_T) PI_clamp_fixdt_n((int16_T)rtb_Gain3, rtP->cf_nKp, - rtP->cf_nKi, rtb_Gain2_f, rtb_Saturation, (int16_T)((rtDW->Divide4 * - rtP->cf_iqKiLimProt) >> 10), &rtDW->PI_clamp_fixdt_n_o); + rtP->cf_nKi, rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1], rtb_Gain2_f, + (int16_T)((rtDW->Divide4 * rtP->cf_iqKiLimProt) >> 10), + &rtDW->PI_clamp_fixdt_n_o); /* End of Outputs for SubSystem: '/PI_clamp_fixdt_n' */ @@ -2137,8 +2146,8 @@ void BLDC_controller_step(RT_MODEL *const rtM) /* Switch: '/Switch' incorporates: * RelationalOperator: '/UpperRelop' */ - if ((int16_T)rtb_Gain3 < rtb_toNegative) { - rtb_id_fieldWeak_M1 = rtb_toNegative; + if ((int16_T)rtb_Gain3 < rtb_Saturation) { + rtb_id_fieldWeak_M1 = rtb_Saturation; } else { rtb_id_fieldWeak_M1 = (int16_T)rtb_Gain3; } @@ -2164,10 +2173,12 @@ void BLDC_controller_step(RT_MODEL *const rtM) * Constant: '/cf_iqKi' * Constant: '/cf_iqKp' * Constant: '/constant' + * Interpolation_n-D: '/Vq_max_M1' * Sum: '/Sum1' */ - PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_iqKp, rtP->cf_iqKi, rtb_Gain2_f, - rtb_Saturation, 0, &rtDW->Merge, &rtDW->PI_clamp_fixdt_iq); + PI_clamp_fixdt((int16_T)rtb_Gain3, rtP->cf_iqKp, rtP->cf_iqKi, + rtP->Vq_max_M1[rtb_r_fieldWeak_XA_o1], rtb_Gain2_f, 0, + &rtDW->Merge, &rtDW->PI_clamp_fixdt_iq); /* End of Outputs for SubSystem: '/PI_clamp_fixdt_iq' */ diff --git a/Src/BLDC_controller_data.c b/Src/BLDC_controller_data.c index d79b74c..7c7dd15 100644 --- a/Src/BLDC_controller_data.c +++ b/Src/BLDC_controller_data.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'BLDC_controller'. * - * Model version : 1.1197 + * Model version : 1.1199 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 - * C/C++ source code generated on : Thu Oct 31 21:29:42 2019 + * C/C++ source code generated on : Sun Nov 3 12:28:16 2019 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex @@ -68,6 +68,16 @@ const ConstP rtConstP = { 16135, 16225, 16294, 16344, 16374, 16384, 16374, 16344, 16294, 16225, 16135, 16026, 15897, 15749, 15582, 15396, 15191, 14968, 14726, 14466, 14189 }, + /* Computed Parameter: iq_maxSca_M1_Table + * Referenced by: '/iq_maxSca_M1' + */ + { 65535U, 65523U, 65484U, 65418U, 65326U, 65207U, 65062U, 64890U, 64691U, + 64465U, 64211U, 63930U, 63620U, 63281U, 62913U, 62516U, 62088U, 61630U, + 61140U, 60618U, 60062U, 59473U, 58848U, 58187U, 57489U, 56752U, 55974U, + 55155U, 54291U, 53381U, 52422U, 51413U, 50349U, 49227U, 48043U, 46792U, + 45470U, 44069U, 42581U, 40997U, 39307U, 37494U, 35541U, 33422U, 31105U, + 28540U, 25655U, 22323U, 18304U, 12974U }, + /* Computed Parameter: vec_hallToPos_Value * Referenced by: '/vec_hallToPos' */ @@ -170,23 +180,6 @@ P rtP_Left = { */ { 0, 80, 240, 560, 1040, 1680, 2400, 3040, 3520, 3840, 4000, 4000 }, - /* Variable: iq_max_M1 - * Referenced by: '/iq_max_M1' - */ - { 12000, 11998, 11990, 11978, 11962, 11940, 11913, 11882, 11845, 11804, 11758, - 11706, 11649, 11587, 11520, 11447, 11369, 11285, 11195, 11100, 10998, 10890, - 10776, 10655, 10527, 10392, 10250, 10100, 9942, 9775, 9600, 9415, 9220, 9015, - 8799, 8570, 8328, 8071, 7799, 7509, 7200, 6868, 6511, 6124, 5700, 5231, 4703, - 4094, 3360, 2388, 0 }, - - /* Variable: iq_max_XA - * Referenced by: '/iq_max_XA' - */ - { 0, 240, 480, 720, 960, 1200, 1440, 1680, 1920, 2160, 2400, 2640, 2880, 3120, - 3360, 3600, 3840, 4080, 4320, 4560, 4800, 5040, 5280, 5520, 5760, 6000, 6240, - 6480, 6720, 6960, 7200, 7440, 7680, 7920, 8160, 8400, 8640, 8880, 9120, 9360, - 9600, 9840, 10080, 10320, 10560, 10800, 11040, 11280, 11520, 11760, 12000 }, - /* Variable: n_commAcvLo * Referenced by: '/n_commDeacv' */ diff --git a/build/firmware.bin b/build/firmware.bin index bee13c2..7593664 100644 Binary files a/build/firmware.bin and b/build/firmware.bin differ diff --git a/build/firmware.elf b/build/firmware.elf index a3ec36e..67bfa45 100644 Binary files a/build/firmware.elf and b/build/firmware.elf differ diff --git a/docs/pictures/paramTable.png b/docs/pictures/paramTable.png index 8606c89..780e6ce 100644 Binary files a/docs/pictures/paramTable.png and b/docs/pictures/paramTable.png differ