From a28e2361fc1bab48117cff68d07ab9ee9951948f Mon Sep 17 00:00:00 2001
From: maniacbug <maniacbug@ymail.com>
Date: Mon, 12 Sep 2011 19:27:27 -0700
Subject: [PATCH] SPI bus speed divider to 4, suggested by Greg Copeland.  Also
 removed duplicated spi setup out of begin(), as it's all in csn()

---
 RF24.cpp | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/RF24.cpp b/RF24.cpp
index 1e87ef6..eae7a45 100644
--- a/RF24.cpp
+++ b/RF24.cpp
@@ -28,9 +28,13 @@
 
 void RF24::csn(int mode)
 {
+  // Minimum ideal SPI bus speed is 2x data rate
+  // If we assume 2Mbs data rate and 16Mhz clock, a
+  // divider of 4 is the minimum we want.
+  // CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
   SPI.setBitOrder(MSBFIRST);
   SPI.setDataMode(SPI_MODE0);
-  SPI.setClockDivider(SPI_CLOCK_DIV2);
+  SPI.setClockDivider(SPI_CLOCK_DIV4);
   digitalWrite(csn_pin,mode);
 }
 
@@ -315,17 +319,7 @@ void RF24::begin(void)
   pinMode(csn_pin,OUTPUT);
 
   // Initialize SPI bus
-  // Minimum ideal SPI bus speed is 2x data rate
-  // If we assume 2Mbs data rate and 16Mhz clock, a
-  // divider of 4 is the minimum we want.
-  // CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
-  // We'll use a divider of 2 which will work up to
-  // MCU speeds of 20Mhz.
-  // CLK:BUS 8Mhz:4Mhz, 16Mhz:8Mhz, or 20Mhz:10Mhz (max)
   SPI.begin();
-  SPI.setBitOrder(MSBFIRST);
-  SPI.setDataMode(SPI_MODE0);
-  SPI.setClockDivider(SPI_CLOCK_DIV2);
 
   ce(LOW);
   csn(HIGH);