[spidev + nixio + fluksod] allow the bitbanged spi max speed and inter-byte delay to be dynamically set from user space
This commit is contained in:
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d208545000
commit
0d3f076b5f
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@ -37,10 +37,10 @@ local SPI_MAX_READ_BYTES = 256
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-- Attributes:
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-- { to = ctrl | delta | uart
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-- body = <string>
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-- parsed = { <command>, <arg1>, <arg2>, ... }
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-- parsed = { 'cmd' = <command>, 1 = <arg1>, 2 = <arg2>, ... }
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-- encoded = <string>
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-- received = { raw = <string>, l = <string>, crc = <string>, u = <string> }
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-- decoded = { l = ..., u = ... }
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-- decoded = { args = <string>, cmd = <string>, 1 = <arg1>, 2= <arg2>, ..., u = <string> }
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-- reply = <string>
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-- }
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--
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@ -54,7 +54,7 @@ end
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function parse(msg)
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msg.parsed = {}
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msg.parsed[1] = msg.body:match('^%l%l')
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msg.parsed.cmd = msg.body:match('^%l%l')
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for arg in msg.body:gmatch('%d+') do
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msg.parsed[#msg.parsed + 1] = arg
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end
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@ -68,33 +68,33 @@ function encode(msg)
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return
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end
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if msg.parsed[1] == 'gd' then
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msg.encoded = msg.parsed[1]
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elseif msg.parsed[1] == 'gv' then
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if msg.parsed.cmd == 'gd' then
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msg.encoded = msg.parsed.cmd
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elseif msg.parsed.cmd == 'gv' then
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elseif msg.parsed[1] == 'gp' then
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elseif msg.parsed.cmd == 'gp' then
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elseif msg.parsed[1] == 'gc' then
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elseif msg.parsed.cmd == 'gc' then
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elseif msg.parsed[1] == 'gm' then
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elseif msg.parsed.cmd == 'gm' then
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elseif msg.parsed[1] == 'gw' then
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elseif msg.parsed.cmd == 'gw' then
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elseif msg.parsed[1] == 'gb' then
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elseif msg.parsed.cmd == 'gb' then
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elseif msg.parsed[1] == 'sv' then
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elseif msg.parsed.cmd == 'sv' then
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elseif msg.parsed[1] == 'sp' then
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elseif msg.parsed.cmd == 'sp' then
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elseif msg.parsed[1] == 'sc' then
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elseif msg.parsed.cmd == 'sc' then
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elseif msg.parsed[1] == 'sm' then
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elseif msg.parsed.cmd == 'sm' then
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elseif msg.parsed[1] == 'sw' then
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elseif msg.parsed.cmd == 'sw' then
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elseif msg.parsed[1] == 'sb' then
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elseif msg.parsed.cmd == 'sb' then
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elseif msg.parsed[1] == 'ct' then
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elseif msg.parsed.cmd == 'ct' then
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else
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@ -116,15 +116,20 @@ function rx(msg, cdev)
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msg.received.raw = cdev:read(SPI_MAX_READ_BYTES)
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msg.received.l, msg.received.u = msg.received.raw:match('^l(%w*)%.?u(%w*)%.?$')
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-- protect against nil values when match should fail
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-- TODO error handling when no reply due to:
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-- * sensor board not operational
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-- * state machine not synced
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msg.received.l, msg.received.u = msg.received.l or '', msg.received.u or ''
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if msg.received.l ~= '' and msg.received.l:sub(1, 2) == msg.parsed[1] then
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if msg.received.l ~= '' then
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msg.received.crc = msg.received.l:sub(-2, -1)
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msg.received.l = msg.received.l:sub(1, -3)
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msg.received.l = msg.received.l:sub( 1, -3)
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if nixio.bin.dow_crc(msg.received.l) ~= nixio.bin.hextonum(msg.received.crc) then
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--> TODO implement crc error counter
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--> TODO implement near-end crc error counter
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msg.received.l = ''
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else
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end
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end
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end
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@ -137,43 +142,46 @@ function decode(msg)
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end
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if msg.received.l ~= '' then
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msg.decoded.largs = msg.received.l:sub(3, -1)
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msg.decoded.cmd = msg.received.l:sub(1, 2)
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msg.decoded.args = msg.received.l:sub(3, -1)
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if msg.parsed[1] == 'gd' then
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for i = 1, msg.decoded.largs:len() / 18 do
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if msg.decoded.cmd == 'gd' then
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for i = 1, msg.decoded.args:len() / 18 do
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msg.decoded[(i-1)*3 + 1] =
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nixio.bin.hextonum(msg.decoded.largs:sub((i-1)*18 + 1, (i-1)*18 + 2))
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nixio.bin.hextonum(msg.decoded.args:sub((i-1)*18 + 1, (i-1)*18 + 2))
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msg.decoded[(i-1)*3 + 2] =
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nixio.bin.hextonum(msg.decoded.largs:sub((i-1)*18 + 3, (i-1)*18 + 10))
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nixio.bin.hextonum(msg.decoded.args:sub((i-1)*18 + 3, (i-1)*18 + 10))
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msg.decoded[(i-1)*3 + 3] =
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nixio.bin.hextonum(msg.decoded.largs:sub((i-1)*18 + 11, (i-1)*18 + 18))
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nixio.bin.hextonum(msg.decoded.args:sub((i-1)*18 + 11, (i-1)*18 + 18))
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end
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elseif msg.parsed[1] == 'gv' then
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elseif msg.parsed.cmd == 'gv' then
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elseif msg.parsed[1] == 'gp' then
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elseif msg.parsed.cmd == 'gp' then
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elseif msg.parsed[1] == 'gc' then
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elseif msg.parsed.cmd == 'gc' then
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elseif msg.parsed[1] == 'gm' then
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elseif msg.parsed.cmd == 'gm' then
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elseif msg.parsed[1] == 'gw' then
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elseif msg.parsed.cmd == 'gw' then
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elseif msg.parsed[1] == 'gb' then
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elseif msg.parsed.cmd == 'gb' then
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elseif msg.parsed[1] == 'sv' then
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elseif msg.parsed.cmd == 'sv' then
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elseif msg.parsed[1] == 'sp' then
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elseif msg.parsed.cmd == 'sp' then
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elseif msg.parsed[1] == 'sc' then
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elseif msg.parsed.cmd == 'sc' then
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elseif msg.parsed[1] == 'sm' then
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elseif msg.parsed.cmd == 'sm' then
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elseif msg.parsed[1] == 'sw' then
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elseif msg.parsed.cmd == 'sw' then
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elseif msg.parsed[1] == 'sb' then
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elseif msg.parsed.cmd == 'sb' then
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elseif msg.parsed[1] == 'ct' then
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elseif msg.parsed.cmd == 'ct' then
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elseif msg.decoded.cmd == 'zz' then
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--> TODO implement far-end crc error counter
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end
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end
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end
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@ -72,7 +72,7 @@ while true do
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msg:rx(spidev)
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msg:decode()
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--> dbg.vardump(msg)
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delta.fdout:write(msg.parsed[1] .. ' ' .. table.concat(msg.decoded, ' ') .. '\n')
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delta.fdout:write(msg.decoded.cmd .. ' ' .. table.concat(msg.decoded, ' ') .. '\n')
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end
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end
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end
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@ -15,7 +15,7 @@ NIXIO_SO = nixio.so
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NIXIO_OBJ = src/nixio.o src/socket.o src/sockopt.o src/bind.o src/address.o \
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src/poll.o src/io.o src/file.o src/splice.o src/process.o src/syslog.o \
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src/bit.o src/binary.o src/fs.o src/user.o \
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src/bit.o src/binary.o src/fs.o src/user.o src/spi.o \
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$(if $(NIXIO_TLS),src/tls-crypto.o src/tls-context.o src/tls-socket.o,)
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ifeq ($(NIXIO_TLS),axtls)
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@ -223,68 +223,6 @@ static int nixio_file_read(lua_State *L) {
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}
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}
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static int nixio_file_spi_read(lua_State *L) {
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int fd = nixio__checkfd(L, 1);
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char buffer[NIXIO_BUFFERSIZE];
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int readc;
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size_t len;
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char last = 0;
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for (size_t i = 0; i < NIXIO_BUFFERSIZE; i++) {
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do {
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readc = read(fd, buffer + i, 1);
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} while (readc == -1 && errno == EINTR);
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if (readc < 0) {
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return nixio__perror(L);
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}
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if (last) {
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break;
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}
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if (buffer[i] == 0x00) {
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len = i;
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last = 1; /* one last pass through the for loop to sync the state machine */
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}
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}
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/* REVISIT: a read on spidev doens't work for numbytes > 1 */
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/* for (size_t i = 0; i < NIXIO_BUFFERSIZE; i += 2) {
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do {
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readc = read(fd, buffer + i, 2);
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} while (readc == -1 && errno == EINTR);
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if (readc < 0) {
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return nixio__perror(L);
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}
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if (buffer[i + 1] == 0x00) {
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len = i;
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if (buffer[i] != 0x00) {
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len = i + 1;
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do {
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readc = read(fd, buffer + i + 2, 1);
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} while (readc == -1 && errno == EINTR);
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if (readc < 0) {
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return nixio__perror(L);
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}
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}
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break;
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}
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}
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*/
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lua_pushlstring(L, buffer, len);
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return 1;
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}
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static int nixio_file_seek(lua_State *L) {
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int fd = nixio__checkfd(L, 1);
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@ -412,7 +350,6 @@ static int nixio_file__tostring(lua_State *L) {
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static const luaL_reg M[] = {
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{"write", nixio_file_write},
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{"read", nixio_file_read},
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{"spiread", nixio_file_spi_read},
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{"tell", nixio_file_tell},
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{"seek", nixio_file_seek},
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{"stat", nixio_file_stat},
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@ -142,6 +142,7 @@ NIXIO_API int luaopen_nixio(lua_State *L) {
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nixio_open_bin(L);
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nixio_open_fs(L);
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nixio_open_user(L);
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nixio_open_spi(L);
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#ifndef NO_TLS
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nixio_open_tls_crypto(L);
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@ -120,6 +120,7 @@ void nixio_open_bit(lua_State *L);
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void nixio_open_bin(lua_State *L);
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void nixio_open_fs(lua_State *L);
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void nixio_open_user(lua_State *L);
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void nixio_open_spi(lua_State *L);
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#ifndef NO_TLS
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void nixio_open_tls_crypto(lua_State *L);
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@ -0,0 +1,89 @@
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/*
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* nixio - Linux I/O library for lua
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*
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* Copyright (C) 2011 Bart Van Der Meerssche <bart.vandermeerssche@flukso.net>
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "nixio.h"
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#include <errno.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/ioctl.h>
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#include <linux/spi/spidev.h>
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/* Defined in linux/spi/spidev.h, but this doesn't seem to propagate to the openwrt staging dir */
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/* Read / Write SPI device default delay us */
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#define SPI_IOC_RD_DELAY_US _IOR(SPI_IOC_MAGIC, 5, __u32)
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#define SPI_IOC_WR_DELAY_US _IOW(SPI_IOC_MAGIC, 5, __u32)
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static int nixio_spi_setspeed(lua_State *L) {
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int fd = nixio__checkfd(L, 1);
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ulong speed_hz = luaL_checkinteger(L, 2);
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uint delay_usecs = luaL_checkinteger(L, 3);
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if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed_hz) < 0) {
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return nixio__perror(L);
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} else if (ioctl(fd, SPI_IOC_WR_DELAY_US, &delay_usecs) < 0) {
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return nixio__perror(L);
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}
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return 0;
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}
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/* not really needed anymore since this is now coded into the spi_bitbang kmod */
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static int nixio_spi_read(lua_State *L) {
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int fd = nixio__checkfd(L, 1);
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char buffer[NIXIO_BUFFERSIZE];
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int readc;
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size_t len;
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char last = 0;
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for (size_t i = 0; i < NIXIO_BUFFERSIZE; i++) {
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do {
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readc = read(fd, buffer + i, 1);
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} while (readc == -1 && errno == EINTR);
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if (readc < 0) {
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return nixio__perror(L);
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}
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if (last) {
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break;
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}
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if (buffer[i] == 0x00) {
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len = i;
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last = 1; /* one last pass through the for loop to sync the state machine */
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}
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}
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lua_pushlstring(L, buffer, len);
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return 1;
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}
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/* module table */
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static const luaL_reg R[] = {
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{"setspeed", nixio_spi_setspeed},
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{"read", nixio_spi_read},
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{NULL, NULL}
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};
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void nixio_open_spi(lua_State *L) {
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lua_newtable(L);
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luaL_register(L, NULL, R);
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lua_setfield(L, -2, "spi");
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}
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@ -41,7 +41,7 @@
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+ .modalias = "spidev",
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+ .controller_data = (void *) SPI_GPIO_NO_CHIPSELECT,
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+ .mode = SPI_MODE_0,
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+ .max_speed_hz = 16000000, /* 16kHz */
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+ .max_speed_hz = 1000000, /* 1Mhz max, but the bitbanged spi doesn't clock faster than 572kHz */
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+ .bus_num = 0,
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+},
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+};
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@ -15,5 +15,5 @@
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- .controller_data = (void *) SPI_GPIO_NO_CHIPSELECT,
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+ .controller_data = (void *) SPI_GPIO_CS,
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.mode = SPI_MODE_0,
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.max_speed_hz = 10000000, /* 10kHz */
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.max_speed_hz = 1000000, /* 1Mhz max, but the bitbanged spi doesn't clock faster than 572kHz */
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.bus_num = 0,
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@ -1,32 +1,173 @@
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--- a/drivers/spi/spi_gpio.c 2010-12-14 01:02:26.673204002 +0100
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+++ b/drivers/spi/spi_gpio.c 2011-01-15 00:26:44.437652996 +0100
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@@ -158,7 +158,9 @@
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static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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- return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
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+ /* shift out a byte in 165us, then pause for 335us */
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+ ndelay(335);
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+ return bitbang_txrx_be_cpha0(spi, 5, 0, word, 8);
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}
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--- a/include/linux/spi/spi.h 2009-12-04 07:00:07.000000000 +0100
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+++ b/include/linux/spi/spi.h 2011-01-18 14:30:48.919450001 +0100
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@@ -68,6 +68,7 @@
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struct device dev;
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struct spi_master *master;
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u32 max_speed_hz;
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+ u16 delay_usecs;
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u8 chip_select;
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u8 mode;
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#define SPI_CPHA 0x01 /* clock phase */
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--- a/include/linux/spi/spidev.h 2009-12-04 07:00:07.000000000 +0100
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+++ b/include/linux/spi/spidev.h 2011-01-18 14:09:47.719449999 +0100
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@@ -124,6 +124,8 @@
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#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32)
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#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32)
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static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
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-
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+/* Read / Write SPI device default delay us */
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+#define SPI_IOC_RD_DELAY_US _IOR(SPI_IOC_MAGIC, 5, __u32)
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+#define SPI_IOC_WR_DELAY_US _IOW(SPI_IOC_MAGIC, 5, __u32)
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#endif /* SPIDEV_H */
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--- a/include/linux/spi/spi_bitbang.h 2009-12-04 07:00:07.000000000 +0100
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+++ b/include/linux/spi/spi_bitbang.h 2011-01-18 13:33:26.731450001 +0100
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@@ -50,7 +50,7 @@
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/* txrx_word[SPI_MODE_*]() just looks like a shift register */
|
||||
u32 (*txrx_word[4])(struct spi_device *spi,
|
||||
- unsigned nsecs,
|
||||
+ unsigned bit_delay, unsigned byte_delay,
|
||||
u32 word, u8 bits);
|
||||
};
|
||||
|
||||
@@ -102,20 +102,22 @@
|
||||
|
||||
static inline u32
|
||||
bitbang_txrx_be_cpha0(struct spi_device *spi,
|
||||
- unsigned nsecs, unsigned cpol,
|
||||
- u32 word, u8 bits)
|
||||
+ unsigned bit_delay, unsigned byte_delay,
|
||||
+ unsigned cpol, u32 word, u8 bits)
|
||||
{
|
||||
/* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
|
||||
|
||||
+ spidelay(byte_delay);
|
||||
+
|
||||
/* clock starts at inactive polarity */
|
||||
for (word <<= (32 - bits); likely(bits); bits--) {
|
||||
|
||||
/* setup MSB (to slave) on trailing edge */
|
||||
setmosi(spi, word & (1 << 31));
|
||||
- spidelay(nsecs); /* T(setup) */
|
||||
+ spidelay(bit_delay); /* T(setup) */
|
||||
|
||||
setsck(spi, !cpol);
|
||||
- spidelay(nsecs);
|
||||
+ spidelay(bit_delay);
|
||||
|
||||
/* sample MSB (from slave) on leading edge */
|
||||
word <<= 1;
|
||||
@@ -127,21 +129,23 @@
|
||||
|
||||
static inline u32
|
||||
bitbang_txrx_be_cpha1(struct spi_device *spi,
|
||||
- unsigned nsecs, unsigned cpol,
|
||||
- u32 word, u8 bits)
|
||||
+ unsigned bit_delay, unsigned byte_delay,
|
||||
+ unsigned cpol, u32 word, u8 bits)
|
||||
{
|
||||
/* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
|
||||
|
||||
+ spidelay(byte_delay);
|
||||
+
|
||||
/* clock starts at inactive polarity */
|
||||
for (word <<= (32 - bits); likely(bits); bits--) {
|
||||
|
||||
/* setup MSB (to slave) on leading edge */
|
||||
setsck(spi, !cpol);
|
||||
setmosi(spi, word & (1 << 31));
|
||||
- spidelay(nsecs); /* T(setup) */
|
||||
+ spidelay(bit_delay); /* T(setup) */
|
||||
|
||||
setsck(spi, cpol);
|
||||
- spidelay(nsecs);
|
||||
+ spidelay(bit_delay);
|
||||
|
||||
/* sample MSB (from slave) on trailing edge */
|
||||
word <<= 1;
|
||||
--- a/drivers/spi/spidev.c 2009-12-04 07:00:07.000000000 +0100
|
||||
+++ b/drivers/spi/spidev.c 2011-01-18 14:15:00.971449999 +0100
|
||||
@@ -362,6 +362,9 @@
|
||||
case SPI_IOC_RD_MAX_SPEED_HZ:
|
||||
retval = __put_user(spi->max_speed_hz, (__u32 __user *)arg);
|
||||
break;
|
||||
+ case SPI_IOC_RD_DELAY_US:
|
||||
+ retval = __put_user(spi->delay_usecs, (__u32 __user *)arg);
|
||||
+ break;
|
||||
|
||||
/* write requests */
|
||||
case SPI_IOC_WR_MODE:
|
||||
@@ -426,7 +429,19 @@
|
||||
dev_dbg(&spi->dev, "%d Hz (max)\n", tmp);
|
||||
}
|
||||
break;
|
||||
+ case SPI_IOC_WR_DELAY_US:
|
||||
+ retval = __get_user(tmp, (__u32 __user *)arg);
|
||||
+ if (retval == 0) {
|
||||
+ u32 save = spi->delay_usecs;
|
||||
|
||||
+ spi->delay_usecs = tmp;
|
||||
+ retval = spi_setup(spi);
|
||||
+ if (retval < 0)
|
||||
+ spi->delay_usecs = save;
|
||||
+ else
|
||||
+ dev_dbg(&spi->dev, "%d us delay\n", tmp);
|
||||
+ }
|
||||
+ break;
|
||||
default:
|
||||
/* segmented and/or full-duplex I/O request */
|
||||
if (_IOC_NR(cmd) != _IOC_NR(SPI_IOC_MESSAGE(0))
|
||||
--- a/drivers/spi/spi_bitbang.c 2009-12-04 07:00:07.000000000 +0100
|
||||
+++ b/drivers/spi/spi_bitbang.c 2011-01-15 00:45:44.257653000 +0100
|
||||
@@ -75,13 +75,28 @@
|
||||
+++ b/drivers/spi/spi_bitbang.c 2011-01-18 20:53:42.079449999 +0100
|
||||
@@ -49,12 +49,14 @@
|
||||
|
||||
struct spi_bitbang_cs {
|
||||
unsigned nsecs; /* (clock cycle time)/2 */
|
||||
- u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
|
||||
+ u32 (*txrx_word)(struct spi_device *spi,
|
||||
+ unsigned bit_delay, unsigned byte_delay,
|
||||
u32 word, u8 bits);
|
||||
unsigned (*txrx_bufs)(struct spi_device *,
|
||||
u32 (*txrx_word)(
|
||||
struct spi_device *spi,
|
||||
- unsigned nsecs,
|
||||
+ unsigned bit_delay,
|
||||
+ unsigned byte_delay,
|
||||
u32 word, u8 bits),
|
||||
unsigned, struct spi_transfer *);
|
||||
};
|
||||
@@ -62,26 +64,42 @@
|
||||
static unsigned bitbang_txrx_8(
|
||||
struct spi_device *spi,
|
||||
u32 (*txrx_word)(struct spi_device *spi,
|
||||
- unsigned nsecs,
|
||||
+ unsigned bit_delay, unsigned byte_delay,
|
||||
u32 word, u8 bits),
|
||||
- unsigned ns,
|
||||
+ unsigned bit_delay,
|
||||
struct spi_transfer *t
|
||||
) {
|
||||
unsigned bits = spi->bits_per_word;
|
||||
unsigned count = t->len;
|
||||
const u8 *tx = t->tx_buf;
|
||||
u8 *rx = t->rx_buf;
|
||||
+ unsigned byte_delay = spi->delay_usecs;
|
||||
|
||||
while (likely(count > 0)) {
|
||||
u8 word = 0;
|
||||
|
||||
- if (tx)
|
||||
+ if (unlikely(tx))
|
||||
word = *tx++;
|
||||
word = txrx_word(spi, ns, word, bits);
|
||||
- word = txrx_word(spi, ns, word, bits);
|
||||
- if (rx)
|
||||
+ word = txrx_word(spi, bit_delay, byte_delay, word, bits);
|
||||
+ if (likely(rx)) {
|
||||
+ /* If we receive a 0x00, fetch one extra byte to sync
|
||||
+ the state machine, then break out of the while loop. */
|
||||
+ if (unlikely(!word)) {
|
||||
+ txrx_word(spi, ns, 0x00, bits); /* discard */
|
||||
+ txrx_word(spi, bit_delay, byte_delay, 0x00, bits); /* discard */
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
|
@ -37,14 +178,38 @@
|
|||
+
|
||||
+ if (unlikely(tx)) {
|
||||
+ /* Signal the end of tx by sending two 0x00's. */
|
||||
+ txrx_word(spi, ns, 0x00, bits);
|
||||
+ txrx_word(spi, ns, 0x00, bits);
|
||||
+ txrx_word(spi, bit_delay, byte_delay, 0x00, bits);
|
||||
+ txrx_word(spi, bit_delay, byte_delay, 0x00, bits);
|
||||
+ }
|
||||
+
|
||||
return t->len - count;
|
||||
}
|
||||
|
||||
@@ -346,12 +361,6 @@
|
||||
@@ -156,10 +174,10 @@
|
||||
bits_per_word = spi->bits_per_word;
|
||||
if (bits_per_word <= 8)
|
||||
cs->txrx_bufs = bitbang_txrx_8;
|
||||
- else if (bits_per_word <= 16)
|
||||
+/* else if (bits_per_word <= 16)
|
||||
cs->txrx_bufs = bitbang_txrx_16;
|
||||
else if (bits_per_word <= 32)
|
||||
- cs->txrx_bufs = bitbang_txrx_32;
|
||||
+ cs->txrx_bufs = bitbang_txrx_32; */
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
@@ -167,8 +185,8 @@
|
||||
if (!hz)
|
||||
hz = spi->max_speed_hz;
|
||||
if (hz) {
|
||||
- cs->nsecs = (1000000000/2) / hz;
|
||||
- if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
|
||||
+ cs->nsecs = (1000000/2) / hz;
|
||||
+ if (cs->nsecs > (MAX_UDELAY_MS * 1000))
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@@ -346,12 +364,6 @@
|
||||
}
|
||||
if (status > 0)
|
||||
m->actual_length += status;
|
||||
|
@ -57,3 +222,41 @@
|
|||
status = 0;
|
||||
|
||||
/* protocol tweaks before next transfer */
|
||||
--- a/drivers/spi/spi_gpio.c 2010-12-14 01:02:26.673204002 +0100
|
||||
+++ b/drivers/spi/spi_gpio.c 2011-01-18 13:29:17.915450000 +0100
|
||||
@@ -156,27 +156,27 @@
|
||||
*/
|
||||
|
||||
static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
|
||||
- unsigned nsecs, u32 word, u8 bits)
|
||||
+ unsigned bit_delay, unsigned byte_delay, u32 word, u8 bits)
|
||||
{
|
||||
- return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
|
||||
+ return bitbang_txrx_be_cpha0(spi, bit_delay, byte_delay, 0, word, bits);
|
||||
}
|
||||
|
||||
static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
|
||||
- unsigned nsecs, u32 word, u8 bits)
|
||||
+ unsigned bit_delay, unsigned byte_delay, u32 word, u8 bits)
|
||||
{
|
||||
- return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
|
||||
+ return bitbang_txrx_be_cpha1(spi, bit_delay, byte_delay, 0, word, bits);
|
||||
}
|
||||
|
||||
static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
|
||||
- unsigned nsecs, u32 word, u8 bits)
|
||||
+ unsigned bit_delay, unsigned byte_delay, u32 word, u8 bits)
|
||||
{
|
||||
- return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
|
||||
+ return bitbang_txrx_be_cpha0(spi, bit_delay, byte_delay, 1, word, bits);
|
||||
}
|
||||
|
||||
static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
|
||||
- unsigned nsecs, u32 word, u8 bits)
|
||||
+ unsigned bit_delay, unsigned byte_delay, u32 word, u8 bits)
|
||||
{
|
||||
- return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
|
||||
+ return bitbang_txrx_be_cpha1(spi, bit_delay, byte_delay, 1, word, bits);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
|
Loading…
Reference in New Issue