From 65db2fe1dda9ca87b2c7515c759fcef16a124003 Mon Sep 17 00:00:00 2001 From: Bart Van Der Meerssche Date: Sat, 15 Jan 2011 23:06:48 +0100 Subject: [PATCH] [avr] add debug macros for tracing interrupts --- mote/v2/avr/debug.h | 14 ++++++++++++++ mote/v2/avr/main.c | 34 +++++++++++++++++++++------------- mote/v2/avr/makefile | 5 +++-- 3 files changed, 38 insertions(+), 15 deletions(-) create mode 100644 mote/v2/avr/debug.h diff --git a/mote/v2/avr/debug.h b/mote/v2/avr/debug.h new file mode 100644 index 0000000..98d8a12 --- /dev/null +++ b/mote/v2/avr/debug.h @@ -0,0 +1,14 @@ +#if DBG > 0 + /* set LED pin high/low at the start/end of an ISR */ + #define DBG_ISR_BEGIN PORTB |= (1< +#include "debug.h" #include "main.h" #include "uart.h" #include "spi.h" @@ -36,10 +37,10 @@ volatile uint8_t spi_status, spi_high_hex; -uint8_t EEMEM first_EEPROM_byte_not_used_to_protect_from_brownout_corruption = 0xab; +uint8_t EEMEM first_EEPROM_byte_not_used_to_protect_from_brownout_corruption = 0xbe; -uint16_t EEMEM EEPROM_version = 210; -uint16_t version; +uint8_t EEMEM EEPROM_version[2] = {2, 1}; +uint8_t version[2]; volatile struct event_struct EEMEM EEPROM_event = {0, 0}; volatile struct event_struct event; @@ -62,6 +63,8 @@ ISR(SPI_STC_vect) uint8_t spi_rx, rx, tx; uint16_t spi_tx; + DBG_ISR_BEGIN + // the SPI is double-buffered, requiring two NO_OPs when switching from Tx to Rx if (spi_status & (SPI_NO_OP_1 | SPI_NO_OP_2)) { spi_status--; @@ -146,6 +149,8 @@ ISR(SPI_STC_vect) // toggle the HEX bit in spi_status spi_status ^= SPI_HIGH_HEX; } + + DBG_ISR_END } ISR(INT0_vect) @@ -173,6 +178,8 @@ ISR(TIMER1_COMPA_vect) { uint8_t muxn_l = phy_to_log[muxn]; + DBG_ISR_BEGIN + MacU16X16to32(state[muxn_l].nano, sensor[muxn_l].meterconst, ADC); if (state[muxn_l].nano > WATT) { @@ -204,6 +211,8 @@ ISR(TIMER1_COMPA_vect) ADMUX |= muxn; /* Start a new ADC conversion. */ ADCSRA |= (1< 0 - // Set PB1=OC1A as output pin - DDRB |= (1<