manufacture controller pcb

This commit is contained in:
interfisch 2020-06-27 02:07:47 +02:00
parent 14f5d2d594
commit 23970ff6aa
8 changed files with 2297 additions and 758 deletions

View File

@ -271,11 +271,8 @@ $FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 -90 40 0 1 0 N
S -90 20 90 20 0 1 0 N
S -90 20 90 40 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
S 90 40 -90 40 0 1 0 N
S 90 40 90 20 0 1 0 N
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
X ~ 1 0 150 110 D 50 50 1 1 P
@ -394,50 +391,6 @@ X B 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# MCU_Microchip_ATmega_ATmega328P-PU
#
DEF MCU_Microchip_ATmega_ATmega328P-PU U 0 20 Y Y 1 F N
F0 "U" -500 1450 50 H V L BNN
F1 "MCU_Microchip_ATmega_ATmega328P-PU" 100 -1450 50 H V L TNN
F2 "Package_DIP:DIP-28_W7.62mm" 0 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN
ALIAS ATmega48P-20PU ATmega48A-PU ATmega48PA-PU ATmega88PV-10PU ATmega88P-20PU ATmega88A-PU ATmega88PA-PU ATmega168PV-10PU ATmega168P-20PU ATmega168A-PU ATmega168PA-PU ATmega328-PU ATmega328P-PU
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -500 -1400 500 1400 0 1 10 f
X ~RESET~/PC6 1 600 -300 100 L 50 50 1 1 T
X XTAL2/PB7 10 600 500 100 L 50 50 1 1 T
X PD5 11 600 -1000 100 L 50 50 1 1 T
X PD6 12 600 -1100 100 L 50 50 1 1 T
X PD7 13 600 -1200 100 L 50 50 1 1 T
X PB0 14 600 1200 100 L 50 50 1 1 T
X PB1 15 600 1100 100 L 50 50 1 1 T
X PB2 16 600 1000 100 L 50 50 1 1 T
X PB3 17 600 900 100 L 50 50 1 1 T
X PB4 18 600 800 100 L 50 50 1 1 T
X PB5 19 600 700 100 L 50 50 1 1 T
X PD0 2 600 -500 100 L 50 50 1 1 T
X AVCC 20 100 1500 100 D 50 50 1 1 W
X AREF 21 -600 1200 100 R 50 50 1 1 P
X GND 22 0 -1500 100 U 50 50 1 1 P N
X PC0 23 600 300 100 L 50 50 1 1 T
X PC1 24 600 200 100 L 50 50 1 1 T
X PC2 25 600 100 100 L 50 50 1 1 T
X PC3 26 600 0 100 L 50 50 1 1 T
X PC4 27 600 -100 100 L 50 50 1 1 T
X PC5 28 600 -200 100 L 50 50 1 1 T
X PD1 3 600 -600 100 L 50 50 1 1 T
X PD2 4 600 -700 100 L 50 50 1 1 T
X PD3 5 600 -800 100 L 50 50 1 1 T
X PD4 6 600 -900 100 L 50 50 1 1 T
X VCC 7 0 1500 100 D 50 50 1 1 W
X GND 8 0 -1500 100 U 50 50 1 1 W
X XTAL1/PB6 9 600 600 100 L 50 50 1 1 T
ENDDRAW
ENDDEF
#
# Regulator_Linear_L78L33_TO92
#
DEF Regulator_Linear_L78L33_TO92 U 0 10 Y Y 1 F N
@ -503,6 +456,49 @@ X GND 9 0 -700 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# controller-rescue_ATmega328P-PU-MCU_Microchip_ATmega
#
DEF controller-rescue_ATmega328P-PU-MCU_Microchip_ATmega U 0 20 Y Y 1 F N
F0 "U" -500 1450 50 H V L BNN
F1 "controller-rescue_ATmega328P-PU-MCU_Microchip_ATmega" 100 -1450 50 H V L TNN
F2 "Package_DIP:DIP-28_W7.62mm" 0 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -500 -1400 500 1400 0 1 10 f
X ~RESET~/PC6 1 600 -300 100 L 50 50 1 1 T
X XTAL2/PB7 10 600 500 100 L 50 50 1 1 T
X PD5 11 600 -1000 100 L 50 50 1 1 T
X PD6 12 600 -1100 100 L 50 50 1 1 T
X PD7 13 600 -1200 100 L 50 50 1 1 T
X PB0 14 600 1200 100 L 50 50 1 1 T
X PB1 15 600 1100 100 L 50 50 1 1 T
X PB2 16 600 1000 100 L 50 50 1 1 T
X PB3 17 600 900 100 L 50 50 1 1 T
X PB4 18 600 800 100 L 50 50 1 1 T
X PB5 19 600 700 100 L 50 50 1 1 T
X PD0 2 600 -500 100 L 50 50 1 1 T
X AVCC 20 100 1500 100 D 50 50 1 1 W
X AREF 21 -600 1200 100 R 50 50 1 1 P
X GND 22 0 -1500 100 U 50 50 1 1 P N
X PC0 23 600 300 100 L 50 50 1 1 T
X PC1 24 600 200 100 L 50 50 1 1 T
X PC2 25 600 100 100 L 50 50 1 1 T
X PC3 26 600 0 100 L 50 50 1 1 T
X PC4 27 600 -100 100 L 50 50 1 1 T
X PC5 28 600 -200 100 L 50 50 1 1 T
X PD1 3 600 -600 100 L 50 50 1 1 T
X PD2 4 600 -700 100 L 50 50 1 1 T
X PD3 5 600 -800 100 L 50 50 1 1 T
X PD4 6 600 -900 100 L 50 50 1 1 T
X VCC 7 0 1500 100 D 50 50 1 1 W
X GND 8 0 -1500 100 U 50 50 1 1 W
X XTAL1/PB6 9 600 600 100 L 50 50 1 1 T
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P

File diff suppressed because it is too large Load Diff

View File

@ -1,29 +1,10 @@
update=22/05/2015 07:44:53
update=So 12 Apr 2020 12:10:30 CEST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@ -31,3 +12,237 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=controller.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=1
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.3
TrackWidth=1
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

View File

@ -1,6 +1,5 @@
EESchema Schematic File Version 4
LIBS:controller-cache
EELAYER 26 0
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@ -15,7 +14,7 @@ Comment3 ""
Comment4 ""
$EndDescr
$Comp
L MCU_Microchip_ATmega:ATmega328P-PU U1
L controller-rescue:ATmega328P-PU-MCU_Microchip_ATmega U1
U 1 1 5CD141F3
P 1950 3000
F 0 "U1" H 1309 3046 50 0000 R CNN
@ -446,19 +445,6 @@ F 3 "http://www.ti.com/lit/ds/symlink/l293.pdf" H 4750 7250 50 0001 C CNN
1 5050 6550
1 0 0 -1
$EndComp
$Comp
L power:VCC #PWR024
U 1 1 5CD2A75C
P 4950 5450
F 0 "#PWR024" H 4950 5300 50 0001 C CNN
F 1 "VCC" H 4967 5623 50 0000 C CNN
F 2 "" H 4950 5450 50 0001 C CNN
F 3 "" H 4950 5450 50 0001 C CNN
1 4950 5450
1 0 0 -1
$EndComp
Wire Wire Line
4950 5450 4950 5550
Wire Wire Line
4850 7450 4850 7400
Wire Wire Line
@ -479,19 +465,6 @@ Connection ~ 5150 7400
Wire Wire Line
5150 7400 4950 7400
$Comp
L power:VCC #PWR027
U 1 1 5CD2E54B
P 5150 5450
F 0 "#PWR027" H 5150 5300 50 0001 C CNN
F 1 "VCC" H 5167 5623 50 0000 C CNN
F 2 "" H 5150 5450 50 0001 C CNN
F 3 "" H 5150 5450 50 0001 C CNN
1 5150 5450
1 0 0 -1
$EndComp
Wire Wire Line
5150 5450 5150 5550
$Comp
L Connector:Conn_01x02_Male J5
U 1 1 5CD323EC
P 6050 6100
@ -1310,4 +1283,30 @@ Wire Wire Line
3850 1800 3850 2000
Wire Wire Line
3850 2000 4000 2000
Wire Wire Line
4950 5450 4950 5550
$Comp
L power:VCC #PWR024
U 1 1 5CD2A75C
P 4950 5450
F 0 "#PWR024" H 4950 5300 50 0001 C CNN
F 1 "VCC" H 4967 5623 50 0000 C CNN
F 2 "" H 4950 5450 50 0001 C CNN
F 3 "" H 4950 5450 50 0001 C CNN
1 4950 5450
1 0 0 -1
$EndComp
Wire Wire Line
5150 5450 5150 5550
$Comp
L power:VCC #PWR027
U 1 1 5CD2E54B
P 5150 5450
F 0 "#PWR027" H 5150 5300 50 0001 C CNN
F 1 "VCC" H 5167 5623 50 0000 C CNN
F 2 "" H 5150 5450 50 0001 C CNN
F 3 "" H 5150 5450 50 0001 C CNN
1 5150 5450
1 0 0 -1
$EndComp
$EndSCHEMATC