add led panel

This commit is contained in:
interfisch 2019-05-09 18:04:41 +02:00
parent c9548f5379
commit 26548cf9d8
8 changed files with 2170 additions and 3 deletions

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@ -1884,9 +1884,9 @@
(net 7 GNDA))
)
(gr_line (start 12.7 133.35) (end 12.7 12.7) (layer Edge.Cuts) (width 0.15))
(gr_line (start 113.03 133.35) (end 12.7 133.35) (layer Edge.Cuts) (width 0.15))
(gr_line (start 113.03 12.7) (end 113.03 133.35) (layer Edge.Cuts) (width 0.15))
(gr_line (start 12.7 114.3) (end 12.7 12.7) (layer Edge.Cuts) (width 0.15))
(gr_line (start 113.03 114.3) (end 12.7 114.3) (layer Edge.Cuts) (width 0.15))
(gr_line (start 113.03 12.7) (end 113.03 114.3) (layer Edge.Cuts) (width 0.15))
(gr_line (start 12.7 12.7) (end 113.03 12.7) (layer Edge.Cuts) (width 0.15))
(segment (start 132.12 86.36) (end 132.08 86.32) (width 1) (layer B.Cu) (net 1))

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
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#
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#
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#
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#
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#
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#
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#
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update=22/05/2015 07:44:53
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]

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@ -0,0 +1,639 @@
EESchema Schematic File Version 4
LIBS:ledpanel-cache
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F 0 "#PWR0132" H 6050 1050 50 0001 C CNN
F 1 "GNDD" H 6054 1145 50 0000 C CNN
F 2 "" H 6050 1300 50 0001 C CNN
F 3 "" H 6050 1300 50 0001 C CNN
1 6050 1300
1 0 0 -1
$EndComp
$Comp
L power:+5V #PWR0133
U 1 1 5CD460A6
P 6700 1000
F 0 "#PWR0133" H 6700 850 50 0001 C CNN
F 1 "+5V" H 6715 1173 50 0000 C CNN
F 2 "" H 6700 1000 50 0001 C CNN
F 3 "" H 6700 1000 50 0001 C CNN
1 6700 1000
1 0 0 -1
$EndComp
$Comp
L Device:C C8
U 1 1 5CD460AC
P 6700 1150
F 0 "C8" H 6815 1196 50 0000 L CNN
F 1 "10nF" H 6815 1105 50 0000 L CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 6738 1000 50 0001 C CNN
F 3 "~" H 6700 1150 50 0001 C CNN
1 6700 1150
1 0 0 -1
$EndComp
$Comp
L power:GNDD #PWR0134
U 1 1 5CD460B2
P 6700 1300
F 0 "#PWR0134" H 6700 1050 50 0001 C CNN
F 1 "GNDD" H 6704 1145 50 0000 C CNN
F 2 "" H 6700 1300 50 0001 C CNN
F 3 "" H 6700 1300 50 0001 C CNN
1 6700 1300
1 0 0 -1
$EndComp
$Comp
L power:+5V #PWR0135
U 1 1 5CD46C28
P 1550 1800
F 0 "#PWR0135" H 1550 1650 50 0001 C CNN
F 1 "+5V" V 1565 1928 50 0000 L CNN
F 2 "" H 1550 1800 50 0001 C CNN
F 3 "" H 1550 1800 50 0001 C CNN
1 1550 1800
0 1 -1 0
$EndComp
Wire Wire Line
1600 1700 1550 1700
Wire Wire Line
7250 1700 7250 2050
Wire Wire Line
7250 2050 7450 2050
$Comp
L power:GNDD #PWR0136
U 1 1 5CD47F44
P 7350 1950
F 0 "#PWR0136" H 7350 1700 50 0001 C CNN
F 1 "GNDD" H 7354 1795 50 0000 C CNN
F 2 "" H 7350 1950 50 0001 C CNN
F 3 "" H 7350 1950 50 0001 C CNN
1 7350 1950
-1 0 0 -1
$EndComp
Wire Wire Line
7450 1950 7350 1950
$Comp
L Connector_Generic:Conn_01x03 J2
U 1 1 5CD48CA9
P 1350 1800
F 0 "J2" H 1270 1475 50 0000 C CNN
F 1 "Conn_Input" H 1270 1566 50 0000 C CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Horizontal" H 1350 1800 50 0001 C CNN
F 3 "~" H 1350 1800 50 0001 C CNN
1 1350 1800
-1 0 0 1
$EndComp
Wire Wire Line
7450 2150 7000 2150
Wire Wire Line
1550 2150 1850 2150
$EndSCHEMATC

View File

@ -0,0 +1,2 @@
(sym_lib_table
)