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fix missing gnd flag

This commit is contained in:
interfisch 2020-02-01 01:04:57 +01:00
parent 95dc7ab998
commit f7f963167c
2 changed files with 10 additions and 10 deletions
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18
reverseengeneering/annax37623/annax37623.bak
View File

@ -1105,12 +1105,6 @@ F 3 "" H 4450 3000 50 0001 C CNN
$EndComp $EndComp
Wire Wire Line Wire Wire Line
4450 3000 4450 2900 4450 3000 4450 2900
Wire Wire Line
7050 4550 7050 4650
Wire Wire Line
7050 4650 7100 4650
Wire Wire Line
5150 2700 4950 2700
NoConn ~ 2700 2150 NoConn ~ 2700 2150
$Comp $Comp
L 4xxx_IEEE:4015 USR1 L 4xxx_IEEE:4015 USR1
@ -1472,8 +1466,6 @@ Text GLabel 11600 9600 0 50 Input ~ 0
Clock Clock
Text GLabel 5400 8500 0 50 Input ~ 0 Text GLabel 5400 8500 0 50 Input ~ 0
Clock Clock
Text GLabel 5150 2700 2 50 Input ~ 0
Clock
Wire Wire Line Wire Wire Line
9850 6800 10050 6800 9850 6800 10050 6800
Wire Wire Line Wire Wire Line
@ -3836,8 +3828,6 @@ Wire Wire Line
12250 3500 12250 3550 12250 3500 12250 3550
Wire Wire Line Wire Wire Line
6600 3050 11150 3050 6600 3050 11150 3050
Text GLabel 7100 4650 2 50 Input ~ 0
Clock
Wire Wire Line Wire Wire Line
4000 4500 6400 4500 4000 4500 6400 4500
Wire Wire Line Wire Wire Line
@ -3914,4 +3904,12 @@ Wire Wire Line
Connection ~ 4350 2700 Connection ~ 4350 2700
Text GLabel 5150 2900 2 50 Input ~ 0 Text GLabel 5150 2900 2 50 Input ~ 0
Clock Clock
Wire Wire Line
7200 2700 7200 4600
Wire Wire Line
7200 4600 7050 4600
Wire Wire Line
7050 4600 7050 4550
Wire Wire Line
4950 2700 7200 2700
$EndSCHEMATC $EndSCHEMATC

2
reverseengeneering/annax37623/annax37623.sch
View File

@ -3912,4 +3912,6 @@ Wire Wire Line
7050 4600 7050 4550 7050 4600 7050 4550
Wire Wire Line Wire Wire Line
4950 2700 7200 2700 4950 2700 7200 2700
Text Notes 3500 3600 2 50 ~ 0
GND
$EndSCHEMATC $EndSCHEMATC