format

.clang-format

@@ -0,0 +1,27 @@
+---
+BasedOnStyle: LLVM
+AccessModifierOffset: '2'
+AlignAfterOpenBracket: Align
+AlignConsecutiveAssignments: 'true'
+AlignOperands: 'false'
+AlignTrailingComments: 'true'
+SortIncludes: 'false'
+ColumnLimit: '0'
+IndentCaseLabels: 'true'
+IndentWidth: '2'
+KeepEmptyLinesAtTheStartOfBlocks: 'false'
+MaxEmptyLinesToKeep: '2'
+SpaceAfterCStyleCast: 'false'
+SpaceBeforeAssignmentOperators: 'true'
+SpaceBeforeParens: Never
+SpaceInEmptyParentheses: 'false'
+SpacesBeforeTrailingComments: '2'
+SpacesInAngles: 'false'
+SpacesInCStyleCastParentheses: 'false'
+SpacesInContainerLiterals: 'false'
+SpacesInParentheses: 'false'
+SpacesInSquareBrackets: 'false'
+TabWidth: '2'
+UseTab: Never
+
+...

Inc/stm32f1xx_hal_conf.h

@@ -118,8 +118,8 @@
   */
 #if !defined(LSI_VALUE)
 #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
-#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz    \
-                                                The real value may vary depending on the variations
+                            The real value may vary depending on the variations \
                             in voltage and temperature. */
 
 /**

Makefile

@@ -149,6 +149,8 @@ $(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
 $(BUILD_DIR):
 	mkdir $@		
 
+format:
+	find Src/ Inc/ -iname '*.h' -o -iname '*.c' | xargs clang-format -i
 #######################################
 # clean up
 #######################################

Src/main.c

@@ -96,7 +96,7 @@ volatile uint8_t uart_buf[10];
 
 void DMA1_Channel1_IRQHandler() {
   DMA1->IFCR = DMA_IFCR_CTCIF1;
-  
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, 1);
   /*
   uart_buf[0] = 0xff;
   uart_buf[1] = adc_buffer.r_dc1 - 1850 + 127;
@@ -119,10 +119,8 @@ void DMA1_Channel1_IRQHandler(){
 
   if(adc_buffer.l_dc2 > 1950) {
     LEFT_TIM->BDTR &= ~TIM_BDTR_MOE;
-    HAL_GPIO_WritePin(LED_PORT, LED_PIN, 1);
   } else {
     LEFT_TIM->BDTR |= TIM_BDTR_MOE;
-    HAL_GPIO_WritePin(LED_PORT, LED_PIN, 0);
   }
 
   if(adc_buffer.r_dc1 > 1950) {
@@ -139,13 +137,13 @@ void DMA1_Channel1_IRQHandler(){
   int vr = 0;
   int wr = 0;
 
-  uint8_t hall_ul = HAL_GPIO_ReadPin(LEFT_HALL_U_PORT, LEFT_HALL_U_PIN);
+  uint8_t hall_ul = !(LEFT_HALL_U_PORT->IDR & LEFT_HALL_U_PIN);
-  uint8_t hall_vl = HAL_GPIO_ReadPin(LEFT_HALL_V_PORT, LEFT_HALL_V_PIN);
+  uint8_t hall_vl = !(LEFT_HALL_V_PORT->IDR & LEFT_HALL_V_PIN);
-  uint8_t hall_wl = HAL_GPIO_ReadPin(LEFT_HALL_W_PORT, LEFT_HALL_W_PIN);
+  uint8_t hall_wl = !(LEFT_HALL_W_PORT->IDR & LEFT_HALL_W_PIN);
 
-  uint8_t hall_ur = HAL_GPIO_ReadPin(RIGHT_HALL_U_PORT, RIGHT_HALL_U_PIN);
+  uint8_t hall_ur = !(RIGHT_HALL_U_PORT->IDR & RIGHT_HALL_U_PIN);
-  uint8_t hall_vr = HAL_GPIO_ReadPin(RIGHT_HALL_V_PORT, RIGHT_HALL_V_PIN);
+  uint8_t hall_vr = !(RIGHT_HALL_V_PORT->IDR & RIGHT_HALL_V_PIN);
-  uint8_t hall_wr = HAL_GPIO_ReadPin(RIGHT_HALL_W_PORT, RIGHT_HALL_W_PIN);
+  uint8_t hall_wr = !(RIGHT_HALL_W_PORT->IDR & RIGHT_HALL_W_PIN);
 
   uint8_t halll = hall_ul * 1 + hall_vl * 2 + hall_wl * 4;
   posl          = hall_to_pos[halll];
@@ -178,7 +176,6 @@ void DMA1_Channel1_IRQHandler(){
   block(pwml, posl, &ul, &vl, &wl);
   block(pwmr, posr, &ur, &vr, &wr);
 
-
   LEFT_TIM->LEFT_TIM_U = CLAMP(ul + pwm_res / 2, 0, pwm_res);
   LEFT_TIM->LEFT_TIM_V = CLAMP(vl + pwm_res / 2, 0, pwm_res);
   LEFT_TIM->LEFT_TIM_W = CLAMP(wl + pwm_res / 2, 0, pwm_res);
@@ -186,13 +183,12 @@ void DMA1_Channel1_IRQHandler(){
   RIGHT_TIM->RIGHT_TIM_U = CLAMP(ur + pwm_res / 2, 0, pwm_res);
   RIGHT_TIM->RIGHT_TIM_V = CLAMP(vr + pwm_res / 2, 0, pwm_res);
   RIGHT_TIM->RIGHT_TIM_W = CLAMP(wr + pwm_res / 2, 0, pwm_res);
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, 0);
 }
 
 int milli_vel_error_sum = 0;
 
-int main(void)
+int main(void) {
-{
-
   HAL_Init();
   __HAL_RCC_AFIO_CLK_ENABLE();
   HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
@@ -226,8 +222,7 @@ int main(void)
   HAL_ADC_Start(&hadc1);
   HAL_ADC_Start(&hadc2);
 
-  while (1)
+  while(1) {
-  {
     HAL_Delay(0);
     // int milli_cur = 3000;
     // int milli_volt = milli_cur * MILLI_R / 1000;// + vel * MILLI_PSI * 141;
@@ -252,9 +247,7 @@ int main(void)
 
 /** System Clock Configuration
 */
-void SystemClock_Config(void)
+void SystemClock_Config(void) {
-{
-
   RCC_OscInitTypeDef RCC_OscInitStruct;
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_PeriphCLKInitTypeDef PeriphClkInit;
@@ -271,8 +264,7 @@ void SystemClock_Config(void)
 
   /**Initializes the CPU, AHB and APB busses clocks 
     */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+  RCC_ClkInitStruct.ClockType      = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;

Src/setup.c

@@ -18,6 +18,22 @@
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
 
+/*
+tim1 master, enable -> trgo
+tim8, gated slave mode, trgo by tim1 trgo. overflow -> trgo
+adc1,adc2 triggered by tim8 trgo
+adc 1,2 dual mode
+
+ADC1             ADC2
+R_Blau PC4 CH14  R_Gelb PC5 CH15
+L_Grün PA0 CH01  L_Blau PC3 CH13
+R_DC PC1 CH11    L_DC PC0 CH10
+BAT   PC2 CH12   L_TX PA2 CH02
+BAT   PC2 CH12   L_RX PA3 CH03
+
+pb10 usart3 dma1 channel2/3
+*/
+
 #include "defines.h"
 
 TIM_HandleTypeDef htim_right;
@@ -58,10 +74,7 @@ void UART_Init(){
 }
 
 
-
+void MX_GPIO_Init(void) {
-void MX_GPIO_Init(void)
-{
-
   GPIO_InitTypeDef GPIO_InitStruct;
 
   /* GPIO Ports Clock Enable */
@@ -267,8 +280,7 @@ void MX_TIM_Init(void){
   __HAL_TIM_ENABLE(&htim_right);
 }
 
-void MX_ADC1_Init(void)
+void MX_ADC1_Init(void) {
-{
   ADC_MultiModeTypeDef multimode;
   ADC_ChannelConfTypeDef sConfig;
 
@@ -332,8 +344,7 @@ void MX_ADC1_Init(void)
 }
 
 /* ADC2 init function */
-void MX_ADC2_Init(void)
+void MX_ADC2_Init(void) {
-{
   ADC_ChannelConfTypeDef sConfig;
 
   __HAL_RCC_ADC2_CLK_ENABLE();

Src/stm32f1xx_it.c

@@ -49,8 +49,7 @@
 /**
 * @brief This function handles Non maskable interrupt.
 */
-void NMI_Handler(void)
+void NMI_Handler(void) {
-{
   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
@@ -62,13 +61,11 @@ void NMI_Handler(void)
 /**
 * @brief This function handles Hard fault interrupt.
 */
-void HardFault_Handler(void)
+void HardFault_Handler(void) {
-{
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
-  while (1)
+  while(1) {
-  {
   }
   /* USER CODE BEGIN HardFault_IRQn 1 */
 
@@ -78,13 +75,11 @@ void HardFault_Handler(void)
 /**
 * @brief This function handles Memory management fault.
 */
-void MemManage_Handler(void)
+void MemManage_Handler(void) {
-{
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
-  while (1)
+  while(1) {
-  {
   }
   /* USER CODE BEGIN MemoryManagement_IRQn 1 */
 
@@ -94,13 +89,11 @@ void MemManage_Handler(void)
 /**
 * @brief This function handles Prefetch fault, memory access fault.
 */
-void BusFault_Handler(void)
+void BusFault_Handler(void) {
-{
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
   /* USER CODE END BusFault_IRQn 0 */
-  while (1)
+  while(1) {
-  {
   }
   /* USER CODE BEGIN BusFault_IRQn 1 */
 
@@ -110,13 +103,11 @@ void BusFault_Handler(void)
 /**
 * @brief This function handles Undefined instruction or illegal state.
 */
-void UsageFault_Handler(void)
+void UsageFault_Handler(void) {
-{
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
-  while (1)
+  while(1) {
-  {
   }
   /* USER CODE BEGIN UsageFault_IRQn 1 */
 
@@ -126,8 +117,7 @@ void UsageFault_Handler(void)
 /**
 * @brief This function handles System service call via SWI instruction.
 */
-void SVC_Handler(void)
+void SVC_Handler(void) {
-{
   /* USER CODE BEGIN SVCall_IRQn 0 */
 
   /* USER CODE END SVCall_IRQn 0 */
@@ -139,8 +129,7 @@ void SVC_Handler(void)
 /**
 * @brief This function handles Debug monitor.
 */
-void DebugMon_Handler(void)
+void DebugMon_Handler(void) {
-{
   /* USER CODE BEGIN DebugMonitor_IRQn 0 */
 
   /* USER CODE END DebugMonitor_IRQn 0 */
@@ -152,8 +141,7 @@ void DebugMon_Handler(void)
 /**
 * @brief This function handles Pendable request for system service.
 */
-void PendSV_Handler(void)
+void PendSV_Handler(void) {
-{
   /* USER CODE BEGIN PendSV_IRQn 0 */
 
   /* USER CODE END PendSV_IRQn 0 */
@@ -165,8 +153,7 @@ void PendSV_Handler(void)
 /**
 * @brief This function handles System tick timer.
 */
-void SysTick_Handler(void)
+void SysTick_Handler(void) {
-{
   /* USER CODE BEGIN SysTick_IRQn 0 */
 
   /* USER CODE END SysTick_IRQn 0 */
@@ -185,7 +172,6 @@ void SysTick_Handler(void)
 /******************************************************************************/
 
 
-
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */

Src/system_stm32f1xx.c

@@ -93,12 +93,12 @@
   */
 
 #if !defined(HSE_VALUE)
-  #define HSE_VALUE               8000000U /*!< Default value of the External oscillator in Hz.
+#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. \
                                 This value can be provided and adapted by the user application. */
 #endif /* HSE_VALUE */
 
 #if !defined(HSI_VALUE)
-  #define HSI_VALUE               8000000U /*!< Default value of the Internal oscillator in Hz.
+#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. \
                                 This value can be provided and adapted by the user application. */
 #endif /* HSI_VALUE */
 
@@ -110,7 +110,7 @@
 /*!< Uncomment the following line if you need to relocate your vector Table in
      Internal SRAM. */
 /* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x00000000U /*!< Vector Table base offset field. 
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. \
                                  This value must be a multiple of 0x200. */
 
 
@@ -172,8 +172,7 @@ const uint8_t APBPrescTable[8U] =  {0, 0, 0, 0, 1, 2, 3, 4};
   * @param  None
   * @retval None
   */
-void SystemInit (void)
+void SystemInit(void) {
-{
   /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
   /* Set HSION bit */
   RCC->CR |= 0x00000001U;
@@ -262,8 +261,7 @@ void SystemInit (void)
   * @param  None
   * @retval None
   */
-void SystemCoreClockUpdate (void)
+void SystemCoreClockUpdate(void) {
-{
   uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
 
 #if defined(STM32F105xC) || defined(STM32F107xC)
@@ -277,8 +275,7 @@ void SystemCoreClockUpdate (void)
   /* Get SYSCLK source -------------------------------------------------------*/
   tmp = RCC->CFGR & RCC_CFGR_SWS;
 
-  switch (tmp)
+  switch(tmp) {
-  {
     case 0x00U: /* HSI used as system clock */
       SystemCoreClock = HSI_VALUE;
       break;
@@ -294,25 +291,19 @@ void SystemCoreClockUpdate (void)
 #if !defined(STM32F105xC) && !defined(STM32F107xC)
       pllmull = (pllmull >> 18U) + 2U;
 
-      if (pllsource == 0x00U)
+      if(pllsource == 0x00U) {
-      {
         /* HSI oscillator clock divided by 2 selected as PLL clock entry */
         SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
-      }
+      } else {
-      else
-      {
 #if defined(STM32F100xB) || defined(STM32F100xE)
         prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
         /* HSE oscillator clock selected as PREDIV1 clock entry */
         SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
 #else
         /* HSE selected as PLL clock entry */
-        if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
+        if((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) { /* HSE oscillator clock divided by 2 */
-        {/* HSE oscillator clock divided by 2 */
           SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
-        }
+        } else {
-        else
-        {
           SystemCoreClock = HSE_VALUE * pllmull;
         }
 #endif
@@ -320,34 +311,25 @@ void SystemCoreClockUpdate (void)
 #else
       pllmull = pllmull >> 18U;
 
-      if (pllmull != 0x0DU)
+      if(pllmull != 0x0DU) {
-      {
         pllmull += 2U;
-      }
+      } else { /* PLL multiplication factor = PLL input clock * 6.5 */
-      else
-      { /* PLL multiplication factor = PLL input clock * 6.5 */
         pllmull = 13U / 2U;
       }
 
-      if (pllsource == 0x00U)
+      if(pllsource == 0x00U) {
-      {
         /* HSI oscillator clock divided by 2 selected as PLL clock entry */
         SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
-      }
+      } else { /* PREDIV1 selected as PLL clock entry */
-      else
-      {/* PREDIV1 selected as PLL clock entry */
 
         /* Get PREDIV1 clock source and division factor */
         prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
         prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
 
-        if (prediv1source == 0U)
+        if(prediv1source == 0U) {
-        { 
           /* HSE oscillator clock selected as PREDIV1 clock entry */
           SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
-        }
+        } else { /* PLL2 clock selected as PREDIV1 clock entry */
-        else
-        {/* PLL2 clock selected as PREDIV1 clock entry */
 
           /* Get PREDIV2 division factor and PLL2 multiplication factor */
           prediv2factor   = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
@@ -387,8 +369,7 @@ void SystemCoreClockUpdate (void)
   * @param  None
   * @retval None
   */
-void SystemInit_ExtMemCtl(void) 
+void SystemInit_ExtMemCtl(void) {
-{
   __IO uint32_t tmpreg;
   /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
     required, then adjust the Register Addresses */