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PI controller update and fixes 

Major:
• all PI controllers with Back-calculation replaced with PI controllers with Clamping to reduce the number of parameters and simplify calculations

Minor:
• fixed the ADC calibration for potetiometer input when ADCx_MIN > 0
• fixed bug: small shock at initialization when current limit I_MOT_MAX is set very small e.g. 1 A
This commit is contained in:
EmanuelFeru 2019-10-31 22:07:52 +01:00
parent 6a30cfce6c
commit 62873aad57
13 changed files with 893 additions and 831 deletions
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01_Matlab/01_Libraries/01_Controller/BLDC_controller_Lib.slx
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01_Matlab/03_CreateParamTable/tableParamType.xlsx
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01_Matlab/BLDCmotorControl_FOC_R2017b_fixdt.slx
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13
01_Matlab/init_model.m
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@ -95,7 +95,7 @@ r_errInpTgtThres = 200; % [-] Error input target threshold (for "Blo
% Current measurement % Current measurement
b_selPhaABCurrMeas = 1; % [-] Measured phase currents selection: {iA,iB} = 1 (default); {iB,iC} = 0 b_selPhaABCurrMeas = 1; % [-] Measured phase currents selection: {iA,iB} = 1 (default); {iB,iC} = 0
dV_openRate = 1000 * Ts_ctrl; % [V/s] Rate for voltage cut-off in Open Mode (Sample Time included in the rate) dV_openRate = 1000 / f_ctrl; % [V/s] Rate for voltage cut-off in Open Mode (Sample Time included in the rate)
% Field Weakening % Field Weakening
b_fieldWeakEna = 0; % [-] Field weakening enable flag: 0 = disable (default), 1 = enable b_fieldWeakEna = 0; % [-] Field weakening enable flag: 0 = disable (default), 1 = enable
@ -109,18 +109,15 @@ r_fieldWeak_XA = [570 600 630 660 690 720 750 780 810 840 870 90
% Q axis control gains % Q axis control gains
cf_iqKp = 0.5; % [-] P gain cf_iqKp = 0.5; % [-] P gain
cf_iqKi = 100 * Ts_ctrl; % [-] I gain cf_iqKi = 100 / f_ctrl; % [-] I gain
cf_iqKb = 1000 * Ts_ctrl; % [-] Back calculation gain for integral anti-windup
% D axis control gains % D axis control gains
cf_idKp = 0.2; % [-] P gain cf_idKp = 0.2; % [-] P gain
cf_idKi = 60 * Ts_ctrl; % [-] I gain cf_idKi = 60 / f_ctrl; % [-] I gain
cf_idKb = 1000 * Ts_ctrl; % [-] Back calculation gain for integral anti-windup
% Speed control gains % Speed control gains
cf_nKp = 1.18; % [-] P gain cf_nKp = 1.18; % [-] P gain
cf_nKi = 20.4 * Ts_ctrl; % [-] I gain cf_nKi = 20.4 / f_ctrl; % [-] I gain
cf_nKb = 1000 * Ts_ctrl; % [-] Back calculation gain for integral anti-windup
% Limitations % Limitations
%------------------------------- %-------------------------------
@ -138,7 +135,7 @@ n_max = 800; % [rpm] Maximum motor speed
% Current Limitations % Current Limitations
cf_iqKpLimProt = 7.2; % [-] Current limit protection gain (only used in VLT_MODE and SPD_MODE) cf_iqKpLimProt = 7.2; % [-] Current limit protection gain (only used in VLT_MODE and SPD_MODE)
cf_iqKiLimProt = 40.7 * Ts_ctrl; % [-] Current limit protection integral gain (only used in SPD_MODE) cf_iqKiLimProt = 40.7 / f_ctrl; % [-] Current limit protection integral gain (only used in SPD_MODE)
i_max = 15; % [A] Maximum allowed motor current (continuous) i_max = 15; % [A] Maximum allowed motor current (continuous)
i_max = i_max * i_sca; i_max = i_max * i_sca;
iq_max_XA = 0:15:i_max; iq_max_XA = 0:15:i_max;

115
Inc/BLDC_controller.h
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'BLDC_controller'. * Code generated for Simulink model 'BLDC_controller'.
* *
* Model version : 1.1187 * Model version : 1.1197
* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
* C/C++ source code generated on : Sun Oct 27 17:31:20 2019 * C/C++ source code generated on : Thu Oct 31 21:29:42 2019
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex * Embedded hardware selection: ARM Compatible->ARM Cortex
@ -35,27 +35,22 @@ typedef struct {
int16_T UnitDelay_DSTATE; /* '<S17>/UnitDelay' */ int16_T UnitDelay_DSTATE; /* '<S17>/UnitDelay' */
} DW_Counter; } DW_Counter;
/* Block signals and states (auto storage) for system '<S40>/PI_clamp_fixdt_id' */
typedef struct {
int32_T UnitDelay_DSTATE; /* '<S65>/UnitDelay' */
boolean_T UnitDelay1_DSTATE; /* '<S62>/UnitDelay1' */
} DW_PI_clamp_fixdt;
/* Block signals and states (auto storage) for system '<S31>/Low_Pass_Filter' */ /* Block signals and states (auto storage) for system '<S31>/Low_Pass_Filter' */
typedef struct { typedef struct {
int16_T UnitDelay3_DSTATE[2]; /* '<S44>/UnitDelay3' */ int16_T UnitDelay3_DSTATE[2]; /* '<S44>/UnitDelay3' */
} DW_Low_Pass_Filter; } DW_Low_Pass_Filter;
/* Block signals and states (auto storage) for system '<S40>/PI_backCalc_fixdt_Id' */ /* Block signals and states (auto storage) for system '<S38>/PI_clamp_fixdt_n' */
typedef struct { typedef struct {
int32_T UnitDelay_DSTATE; /* '<S61>/UnitDelay' */ int32_T UnitDelay_DSTATE; /* '<S55>/UnitDelay' */
int32_T UnitDelay_DSTATE_l; /* '<S63>/UnitDelay' */ boolean_T UnitDelay1_DSTATE; /* '<S53>/UnitDelay1' */
} DW_PI_backCalc_fixdt; } DW_PI_clamp_fixdt_c;
/* Block signals and states (auto storage) for system '<S38>/PI_backCalc_fixdt_n' */
typedef struct {
int32_T UnitDelay_DSTATE; /* '<S53>/UnitDelay' */
int32_T UnitDelay_DSTATE_h; /* '<S55>/UnitDelay' */
} DW_PI_backCalc_fixdt_f;
/* Block signals and states (auto storage) for system '<S36>/Rate_Limiter' */
typedef struct {
int32_T UnitDelay_DSTATE; /* '<S51>/UnitDelay' */
} DW_Rate_Limiter;
/* Block signals and states (auto storage) for system '<S22>/Counter' */ /* Block signals and states (auto storage) for system '<S22>/Counter' */
typedef struct { typedef struct {
@ -79,19 +74,19 @@ typedef struct {
typedef struct { typedef struct {
DW_either_edge either_edge_a; /* '<S3>/either_edge' */ DW_either_edge either_edge_a; /* '<S3>/either_edge' */
DW_Debounce_Filter Debounce_Filter_f;/* '<S3>/Debounce_Filter' */ DW_Debounce_Filter Debounce_Filter_f;/* '<S3>/Debounce_Filter' */
DW_Rate_Limiter Rate_Limiter_l; /* '<S36>/Rate_Limiter' */ DW_PI_clamp_fixdt PI_clamp_fixdt_iq; /* '<S39>/PI_clamp_fixdt_iq' */
DW_PI_backCalc_fixdt PI_backCalc_fixdt_Iq;/* '<S39>/PI_backCalc_fixdt_Iq' */ DW_PI_clamp_fixdt_c PI_clamp_fixdt_n_o;/* '<S38>/PI_clamp_fixdt_n' */
DW_PI_backCalc_fixdt_f PI_backCalc_fixdt_n_p;/* '<S38>/PI_backCalc_fixdt_n' */
DW_PI_backCalc_fixdt PI_backCalc_fixdt_Id;/* '<S40>/PI_backCalc_fixdt_Id' */
DW_Low_Pass_Filter Low_Pass_Filter_m;/* '<S31>/Low_Pass_Filter' */ DW_Low_Pass_Filter Low_Pass_Filter_m;/* '<S31>/Low_Pass_Filter' */
DW_PI_clamp_fixdt PI_clamp_fixdt_id; /* '<S40>/PI_clamp_fixdt_id' */
DW_Counter Counter_e; /* '<S11>/Counter' */ DW_Counter Counter_e; /* '<S11>/Counter' */
int32_T UnitDelay_DSTATE; /* '<S51>/UnitDelay' */
int16_T Gain4[3]; /* '<S33>/Gain4' */ int16_T Gain4[3]; /* '<S33>/Gain4' */
int16_T Sum1[2]; /* '<S44>/Sum1' */ int16_T Sum1[2]; /* '<S44>/Sum1' */
int16_T z_counterRawPrev; /* '<S16>/z_counterRawPrev' */ int16_T z_counterRawPrev; /* '<S16>/z_counterRawPrev' */
int16_T Merge; /* '<S5>/Merge' */ int16_T Merge; /* '<S5>/Merge' */
int16_T Divide1; /* '<S46>/Divide1' */ int16_T Divide1; /* '<S46>/Divide1' */
int16_T Divide4; /* '<S45>/Divide4' */ int16_T Divide4; /* '<S45>/Divide4' */
int16_T Switch2; /* '<S64>/Switch2' */ int16_T Switch1; /* '<S66>/Switch1' */
int16_T Divide11; /* '<S16>/Divide11' */ int16_T Divide11; /* '<S16>/Divide11' */
int16_T UnitDelay3_DSTATE; /* '<S11>/UnitDelay3' */ int16_T UnitDelay3_DSTATE; /* '<S11>/UnitDelay3' */
int16_T UnitDelay4_DSTATE; /* '<S6>/UnitDelay4' */ int16_T UnitDelay4_DSTATE; /* '<S6>/UnitDelay4' */
@ -101,22 +96,23 @@ typedef struct {
int16_T UnitDelay5_DSTATE; /* '<S16>/UnitDelay5' */ int16_T UnitDelay5_DSTATE; /* '<S16>/UnitDelay5' */
int16_T UnitDelay4_DSTATE_e; /* '<S11>/UnitDelay4' */ int16_T UnitDelay4_DSTATE_e; /* '<S11>/UnitDelay4' */
int16_T UnitDelay4_DSTATE_er; /* '<S5>/UnitDelay4' */ int16_T UnitDelay4_DSTATE_er; /* '<S5>/UnitDelay4' */
int8_T Switch2_e; /* '<S10>/Switch2' */ int8_T Switch2; /* '<S10>/Switch2' */
int8_T UnitDelay2_DSTATE_b; /* '<S10>/UnitDelay2' */ int8_T UnitDelay2_DSTATE_b; /* '<S10>/UnitDelay2' */
int8_T If2_ActiveSubsystem; /* '<S1>/If2' */ int8_T If2_ActiveSubsystem; /* '<S1>/If2' */
int8_T If1_ActiveSubsystem; /* '<S1>/If1' */ int8_T If1_ActiveSubsystem; /* '<S1>/If1' */
int8_T If1_ActiveSubsystem_h; /* '<S5>/If1' */ int8_T If2_ActiveSubsystem_a; /* '<S5>/If2' */
int8_T If1_ActiveSubsystem_e; /* '<S5>/If1' */
int8_T If1_ActiveSubsystem_f; /* '<S35>/If1' */ int8_T If1_ActiveSubsystem_f; /* '<S35>/If1' */
int8_T If2_ActiveSubsystem_c; /* '<S35>/If2' */ int8_T If2_ActiveSubsystem_c; /* '<S35>/If2' */
int8_T SwitchCase_ActiveSubsystem; /* '<S5>/Switch Case' */ int8_T SwitchCase_ActiveSubsystem; /* '<S5>/Switch Case' */
uint8_T UnitDelay1_DSTATE; /* '<S4>/UnitDelay1' */
uint8_T UnitDelay3_DSTATE_fy; /* '<S8>/UnitDelay3' */ uint8_T UnitDelay3_DSTATE_fy; /* '<S8>/UnitDelay3' */
uint8_T UnitDelay1_DSTATE_m; /* '<S8>/UnitDelay1' */ uint8_T UnitDelay1_DSTATE; /* '<S8>/UnitDelay1' */
uint8_T UnitDelay2_DSTATE_f; /* '<S8>/UnitDelay2' */ uint8_T UnitDelay2_DSTATE_f; /* '<S8>/UnitDelay2' */
uint8_T UnitDelay_DSTATE; /* '<S3>/UnitDelay' */ uint8_T UnitDelay1_DSTATE_p; /* '<S4>/UnitDelay1' */
uint8_T is_active_c1_BLDC_controller;/* '<S4>/F02_02_Control_Mode_Manager' */ uint8_T UnitDelay_DSTATE_c; /* '<S3>/UnitDelay' */
uint8_T is_c1_BLDC_controller; /* '<S4>/F02_02_Control_Mode_Manager' */ uint8_T is_active_c1_BLDC_controller;/* '<S4>/F03_02_Control_Mode_Manager' */
uint8_T is_ACTIVE; /* '<S4>/F02_02_Control_Mode_Manager' */ uint8_T is_c1_BLDC_controller; /* '<S4>/F03_02_Control_Mode_Manager' */
uint8_T is_ACTIVE; /* '<S4>/F03_02_Control_Mode_Manager' */
boolean_T Merge_n; /* '<S18>/Merge' */ boolean_T Merge_n; /* '<S18>/Merge' */
boolean_T dz_cntTrnsDet; /* '<S16>/dz_cntTrnsDet' */ boolean_T dz_cntTrnsDet; /* '<S16>/dz_cntTrnsDet' */
boolean_T UnitDelay_DSTATE_g; /* '<S50>/UnitDelay' */ boolean_T UnitDelay_DSTATE_g; /* '<S50>/UnitDelay' */
@ -206,7 +202,7 @@ struct P_ {
* Referenced by: '<S3>/t_errQual' * Referenced by: '<S3>/t_errQual'
*/ */
uint16_T cf_idKp; /* Variable: cf_idKp uint16_T cf_idKp; /* Variable: cf_idKp
* Referenced by: '<S40>/cf_idKp' * Referenced by: '<S40>/cf_idKp1'
*/ */
uint16_T cf_iqKp; /* Variable: cf_iqKp uint16_T cf_iqKp; /* Variable: cf_iqKp
* Referenced by: '<S39>/cf_iqKp' * Referenced by: '<S39>/cf_iqKp'
@ -265,14 +261,8 @@ struct P_ {
uint16_T cf_currFilt; /* Variable: cf_currFilt uint16_T cf_currFilt; /* Variable: cf_currFilt
* Referenced by: '<S31>/cf_currFilt' * Referenced by: '<S31>/cf_currFilt'
*/ */
uint16_T cf_idKb; /* Variable: cf_idKb
* Referenced by: '<S40>/cf_idKb'
*/
uint16_T cf_idKi; /* Variable: cf_idKi uint16_T cf_idKi; /* Variable: cf_idKi
* Referenced by: '<S40>/cf_idKi' * Referenced by: '<S40>/cf_idKi1'
*/
uint16_T cf_iqKb; /* Variable: cf_iqKb
* Referenced by: '<S39>/cf_iqKb'
*/ */
uint16_T cf_iqKi; /* Variable: cf_iqKi uint16_T cf_iqKi; /* Variable: cf_iqKi
* Referenced by: '<S39>/cf_iqKi' * Referenced by: '<S39>/cf_iqKi'
@ -280,9 +270,6 @@ struct P_ {
uint16_T cf_iqKiLimProt; /* Variable: cf_iqKiLimProt uint16_T cf_iqKiLimProt; /* Variable: cf_iqKiLimProt
* Referenced by: '<S38>/cf_iqKiLimProt' * Referenced by: '<S38>/cf_iqKiLimProt'
*/ */
uint16_T cf_nKb; /* Variable: cf_nKb
* Referenced by: '<S38>/cf_nKb'
*/
uint16_T cf_nKi; /* Variable: cf_nKi uint16_T cf_nKi; /* Variable: cf_nKi
* Referenced by: '<S38>/cf_nKi' * Referenced by: '<S38>/cf_nKi'
*/ */
@ -338,20 +325,12 @@ extern void BLDC_controller_step(RT_MODEL *const rtM);
* Block '<S5>/Scope12' : Unused code path elimination * Block '<S5>/Scope12' : Unused code path elimination
* Block '<S5>/Scope8' : Unused code path elimination * Block '<S5>/Scope8' : Unused code path elimination
* Block '<S5>/Scope9' : Unused code path elimination * Block '<S5>/Scope9' : Unused code path elimination
* Block '<S56>/Data Type Duplicate' : Unused code path elimination
* Block '<S56>/Data Type Propagation' : Unused code path elimination
* Block '<S54>/Data Type Duplicate' : Unused code path elimination
* Block '<S54>/Data Type Propagation' : Unused code path elimination
* Block '<S60>/Data Type Duplicate' : Unused code path elimination
* Block '<S60>/Data Type Propagation' : Unused code path elimination
* Block '<S58>/Data Type Duplicate' : Unused code path elimination * Block '<S58>/Data Type Duplicate' : Unused code path elimination
* Block '<S58>/Data Type Propagation' : Unused code path elimination * Block '<S58>/Data Type Propagation' : Unused code path elimination
* Block '<S64>/Data Type Duplicate' : Unused code path elimination * Block '<S63>/Data Type Duplicate' : Unused code path elimination
* Block '<S64>/Data Type Propagation' : Unused code path elimination * Block '<S63>/Data Type Propagation' : Unused code path elimination
* Block '<S62>/Data Type Duplicate' : Unused code path elimination * Block '<S67>/Data Type Duplicate' : Unused code path elimination
* Block '<S62>/Data Type Propagation' : Unused code path elimination * Block '<S67>/Data Type Propagation' : Unused code path elimination
* Block '<S65>/Data Type Duplicate' : Unused code path elimination
* Block '<S65>/Data Type Propagation' : Unused code path elimination
* Block '<S1>/Data Type Conversion2' : Eliminate redundant data type conversion * Block '<S1>/Data Type Conversion2' : Eliminate redundant data type conversion
* Block '<S1>/Data Type Conversion3' : Eliminate redundant data type conversion * Block '<S1>/Data Type Conversion3' : Eliminate redundant data type conversion
* Block '<S1>/Data Type Conversion6' : Eliminate redundant data type conversion * Block '<S1>/Data Type Conversion6' : Eliminate redundant data type conversion
@ -402,8 +381,8 @@ extern void BLDC_controller_step(RT_MODEL *const rtM);
* '<S25>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter/rst_Delay' * '<S25>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter/rst_Delay'
* '<S26>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter' * '<S26>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter'
* '<S27>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter/rst_Delay' * '<S27>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter/rst_Delay'
* '<S28>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F02_01_Mode_Transition_Calculation' * '<S28>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_01_Mode_Transition_Calculation'
* '<S29>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F02_02_Control_Mode_Manager' * '<S29>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F03_02_Control_Mode_Manager'
* '<S30>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform' * '<S30>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform'
* '<S31>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Current_Filtering' * '<S31>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Current_Filtering'
* '<S32>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Field_Weakening' * '<S32>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Field_Weakening'
@ -427,19 +406,21 @@ extern void BLDC_controller_step(RT_MODEL *const rtM);
* '<S50>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/rising_edge_init' * '<S50>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/rising_edge_init'
* '<S51>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter/Delay_Init1' * '<S51>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter/Delay_Init1'
* '<S52>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter/Saturation Dynamic' * '<S52>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter/Saturation Dynamic'
* '<S53>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_backCalc_fixdt_n' * '<S53>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n'
* '<S54>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/Saturation Dynamic1' * '<S54>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n/Clamping_circuit'
* '<S55>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_backCalc_fixdt_n/Integrator' * '<S55>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n/Integrator'
* '<S56>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_backCalc_fixdt_n/Saturation Dynamic1' * '<S56>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_clamp_fixdt_n/Saturation_hit'
* '<S57>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_backCalc_fixdt_Iq' * '<S57>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq'
* '<S58>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/Saturation Dynamic' * '<S58>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/Saturation Dynamic'
* '<S59>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_backCalc_fixdt_Iq/Integrator' * '<S59>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq/Clamping_circuit'
* '<S60>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_backCalc_fixdt_Iq/Saturation Dynamic1' * '<S60>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq/Integrator'
* '<S61>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_backCalc_fixdt_Id' * '<S61>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_clamp_fixdt_iq/Saturation_hit'
* '<S62>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/Saturation Dynamic' * '<S62>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id'
* '<S63>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_backCalc_fixdt_Id/Integrator' * '<S63>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/Saturation Dynamic'
* '<S64>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_backCalc_fixdt_Id/Saturation Dynamic1' * '<S64>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id/Clamping_circuit'
* '<S65>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Voltage_Mode/Saturation Dynamic1' * '<S65>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id/Integrator'
* '<S66>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_clamp_fixdt_id/Saturation_hit'
* '<S67>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Voltage_Mode/Saturation Dynamic1'
*/ */
#endif /* RTW_HEADER_BLDC_controller_h_ */ #endif /* RTW_HEADER_BLDC_controller_h_ */

12
Inc/config.h
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@ -7,7 +7,7 @@
#define DEAD_TIME 32 // PWM deadtime #define DEAD_TIME 32 // PWM deadtime
#define DELAY_IN_MAIN_LOOP 5 // in ms. default 5. it is independent of all the timing critical stuff. do not touch if you do not know what you are doing. #define DELAY_IN_MAIN_LOOP 5 // in ms. default 5. it is independent of all the timing critical stuff. do not touch if you do not know what you are doing.
#define TIMEOUT 5 // number of wrong / missing input commands before emergency off #define TIMEOUT 5 // number of wrong / missing input commands before emergency off
#define A2BIT_CONV 50 // bits per A on ADC. Example: 50 = 1 A, 100 = 2 A, etc #define A2BIT_CONV 50 // A to bit for current conversion on ADC. Example: 1 A = 50, 2 A = 100, etc
// ADC conversion time definitions // ADC conversion time definitions
#define ADC_CONV_TIME_1C5 (14) //Total ADC clock cycles / conversion = ( 1.5+12.5) #define ADC_CONV_TIME_1C5 (14) //Total ADC clock cycles / conversion = ( 1.5+12.5)
@ -127,9 +127,9 @@
#define CTRL_MOD_REQ 1 // [-] Control mode request: 0 = Open mode, 1 = Voltage mode (default), 2 = Speed mode, 3 = Torque mode #define CTRL_MOD_REQ 1 // [-] Control mode request: 0 = Open mode, 1 = Voltage mode (default), 2 = Speed mode, 3 = Torque mode
#define DIAG_ENA 1 // [-] Motor Diagnostics enable flag: 0 = Disabled, 1 = Enabled (default) #define DIAG_ENA 1 // [-] Motor Diagnostics enable flag: 0 = Disabled, 1 = Enabled (default)
#define FIELD_WEAK_ENA 0 // [-] Field Weakening enable flag: 0 = Disabled (default), 1 = Enabled #define FIELD_WEAK_ENA 0 // [-] Field Weakening enable flag: 0 = Disabled (default), 1 = Enabled
#define I_MOT_MAX (15 * A2BIT_CONV) << 4 // [A] Maximum motor current limit (Change only the first number, the rest is needed for fixed-point conversion) #define I_MOT_MAX (15 * A2BIT_CONV) << 4 // [A] Maximum motor current limit (Change only the first number, the rest is needed for fixed-point conversion, fixdt(1,16,4))
#define I_DC_MAX (17 * A2BIT_CONV) // [A] Maximum DC Link current limit (This is the final current protection. Above this value, current chopping is applied. To avoid this make sure that I_DC_MAX = I_MOT_MAX + 2A ) #define I_DC_MAX (17 * A2BIT_CONV) // [A] Maximum DC Link current limit (This is the final current protection. Above this value, current chopping is applied. To avoid this make sure that I_DC_MAX = I_MOT_MAX + 2A )
#define N_MOT_MAX 800 << 4 // [rpm] Maximum motor speed (change only the first number, the rest is needed for fixed-point conversion) #define N_MOT_MAX 800 << 4 // [rpm] Maximum motor speed (change only the first number, the rest is needed for fixed-point conversion, fixdt(1,16,4))
/* GENERAL NOTES: /* GENERAL NOTES:
@ -164,10 +164,10 @@
#define FILTER 6553 // 0.1f [-] lower value == softer filter [0, 65535] = [0.0 - 1.0]. #define FILTER 6553 // 0.1f [-] lower value == softer filter [0, 65535] = [0.0 - 1.0].
// Value of COEFFICIENT is in fixdt(1,16,14) // Value of COEFFICIENT is in fixdt(1,16,14)
// If VAL_floatingPoint >= 0, VAL_fixedPoint = VAL_floatingPoint * 2^15 // If VAL_floatingPoint >= 0, VAL_fixedPoint = VAL_floatingPoint * 2^14
// If VAL_floatingPoint < 0, VAL_fixedPoint = 2^16 + floor(VAL_floatingPoint * 2^15). // If VAL_floatingPoint < 0, VAL_fixedPoint = 2^16 + floor(VAL_floatingPoint * 2^14).
#define SPEED_COEFFICIENT 16384 // 1.0f [-] higher value == stronger. [0, 65535] = [-2.0 - 2.0]. In this case 16384 = 1.0 * 2^14 #define SPEED_COEFFICIENT 16384 // 1.0f [-] higher value == stronger. [0, 65535] = [-2.0 - 2.0]. In this case 16384 = 1.0 * 2^14
#define STEER_COEFFICIENT 8192 // 0.5f [-] higher value == stronger. [0, 65535] = [-2.0 - 2.0]. In this case 8192 = 0.5 * 2^15. If you do not want any steering, set it to 0. #define STEER_COEFFICIENT 8192 // 0.5f [-] higher value == stronger. [0, 65535] = [-2.0 - 2.0]. In this case 8192 = 0.5 * 2^14. If you do not want any steering, set it to 0.
#define INVERT_R_DIRECTION #define INVERT_R_DIRECTION
#define INVERT_L_DIRECTION #define INVERT_L_DIRECTION

4
Inc/rtwtypes.h
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'BLDC_controller'. * Code generated for Simulink model 'BLDC_controller'.
* *
* Model version : 1.1187 * Model version : 1.1197
* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
* C/C++ source code generated on : Sun Oct 27 17:31:20 2019 * C/C++ source code generated on : Thu Oct 31 21:29:42 2019
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex * Embedded hardware selection: ARM Compatible->ARM Cortex

1536
Src/BLDC_controller.c
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33
Src/BLDC_controller_data.c
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@ -3,9 +3,9 @@
* *
* Code generated for Simulink model 'BLDC_controller'. * Code generated for Simulink model 'BLDC_controller'.
* *
* Model version : 1.1187 * Model version : 1.1197
* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
* C/C++ source code generated on : Sun Oct 27 17:31:20 2019 * C/C++ source code generated on : Thu Oct 31 21:29:42 2019
* *
* Target selection: ert.tlc * Target selection: ert.tlc
* Embedded hardware selection: ARM Compatible->ARM Cortex * Embedded hardware selection: ARM Compatible->ARM Cortex
@ -78,7 +78,7 @@ P rtP_Left = {
/* Variable: dV_openRate /* Variable: dV_openRate
* Referenced by: '<S36>/dV_openRate' * Referenced by: '<S36>/dV_openRate'
*/ */
3932, 4096,
/* Variable: dz_cntTrnsDetHi /* Variable: dz_cntTrnsDetHi
* Referenced by: '<S16>/dz_cntTrnsDet' * Referenced by: '<S16>/dz_cntTrnsDet'
@ -121,7 +121,7 @@ P rtP_Left = {
9600U, 9600U,
/* Variable: cf_idKp /* Variable: cf_idKp
* Referenced by: '<S40>/cf_idKp' * Referenced by: '<S40>/cf_idKp1'
*/ */
819U, 819U,
@ -230,40 +230,25 @@ P rtP_Left = {
*/ */
7864U, 7864U,
/* Variable: cf_idKb
* Referenced by: '<S40>/cf_idKb'
*/
3932U,
/* Variable: cf_idKi /* Variable: cf_idKi
* Referenced by: '<S40>/cf_idKi' * Referenced by: '<S40>/cf_idKi1'
*/ */
236U, 246U,
/* Variable: cf_iqKb
* Referenced by: '<S39>/cf_iqKb'
*/
3932U,
/* Variable: cf_iqKi /* Variable: cf_iqKi
* Referenced by: '<S39>/cf_iqKi' * Referenced by: '<S39>/cf_iqKi'
*/ */
393U, 410U,
/* Variable: cf_iqKiLimProt /* Variable: cf_iqKiLimProt
* Referenced by: '<S38>/cf_iqKiLimProt' * Referenced by: '<S38>/cf_iqKiLimProt'
*/ */
160U, 167U,
/* Variable: cf_nKb
* Referenced by: '<S38>/cf_nKb'
*/
3932U,
/* Variable: cf_nKi /* Variable: cf_nKi
* Referenced by: '<S38>/cf_nKi' * Referenced by: '<S38>/cf_nKi'
*/ */
80U, 84U,
/* Variable: cf_iqKpLimProt /* Variable: cf_iqKpLimProt
* Referenced by: '<S45>/cf_iqKpLimProt' * Referenced by: '<S45>/cf_iqKpLimProt'

11
Src/main.c
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@ -63,9 +63,6 @@ extern volatile adc_buf_t adc_buffer;
extern I2C_HandleTypeDef hi2c2; extern I2C_HandleTypeDef hi2c2;
extern UART_HandleTypeDef huart2; extern UART_HandleTypeDef huart2;
static int cmd1; // normalized input values. -1000 to 1000
static int cmd2;
typedef struct{ typedef struct{
int16_t steer; int16_t steer;
int16_t speed; int16_t speed;
@ -76,6 +73,8 @@ static volatile Serialcommand command;
static uint8_t button1, button2; static uint8_t button1, button2;
static int cmd1; // normalized input value. -1000 to 1000
static int cmd2; // normalized input value. -1000 to 1000
static int16_t steer; // local variable for steering. -1000 to 1000 static int16_t steer; // local variable for steering. -1000 to 1000
static int16_t speed; // local variable for speed. -1000 to 1000 static int16_t speed; // local variable for speed. -1000 to 1000
static int16_t steerFixdt; // local fixed-point variable for steering low-pass filter static int16_t steerFixdt; // local fixed-point variable for steering low-pass filter
@ -271,14 +270,14 @@ int main(void) {
cmd1 = CLAMP(adc_buffer.l_tx2 - ADC1_MID, 0, ADC1_MAX - ADC1_MID) * 1000 / (ADC1_MAX - ADC1_MID) cmd1 = CLAMP(adc_buffer.l_tx2 - ADC1_MID, 0, ADC1_MAX - ADC1_MID) * 1000 / (ADC1_MAX - ADC1_MID)
-CLAMP(ADC1_MID - adc_buffer.l_tx2, 0, ADC1_MID - ADC1_MIN) * 1000 / (ADC1_MID - ADC1_MIN); // ADC1 -CLAMP(ADC1_MID - adc_buffer.l_tx2, 0, ADC1_MID - ADC1_MIN) * 1000 / (ADC1_MID - ADC1_MIN); // ADC1
#else #else
cmd1 = CLAMP(adc_buffer.l_tx2 - ADC1_MIN, 0, ADC1_MAX) * 1000 / ADC1_MAX; // ADC1 cmd1 = CLAMP(adc_buffer.l_tx2 - ADC1_MIN, 0, ADC1_MAX) * 1000 / (ADC1_MAX - ADC1_MIN); // ADC1
#endif #endif
#ifdef ADC2_MID_POT #ifdef ADC2_MID_POT
cmd2 = CLAMP(adc_buffer.l_rx2 - ADC2_MID, 0, ADC2_MAX - ADC2_MID) * 1000 / (ADC2_MAX - ADC2_MID) cmd2 = CLAMP(adc_buffer.l_rx2 - ADC2_MID, 0, ADC2_MAX - ADC2_MID) * 1000 / (ADC2_MAX - ADC2_MID)
-CLAMP(ADC2_MID - adc_buffer.l_rx2, 0, ADC2_MID - ADC2_MIN) * 1000 / (ADC2_MID - ADC2_MIN); // ADC2 -CLAMP(ADC2_MID - adc_buffer.l_rx2, 0, ADC2_MID - ADC2_MIN) * 1000 / (ADC2_MID - ADC2_MIN); // ADC2
#else #else
cmd2 = CLAMP(adc_buffer.l_rx2 - ADC2_MIN, 0, ADC2_MAX) * 1000 / ADC2_MAX; // ADC2 cmd2 = CLAMP(adc_buffer.l_rx2 - ADC2_MIN, 0, ADC2_MAX) * 1000 / (ADC2_MAX - ADC2_MIN); // ADC2
#endif #endif
// use ADCs as button inputs: // use ADCs as button inputs:
@ -567,7 +566,7 @@ void rateLimiter16(int16_t u, int16_t rate, int16_t *y)
} }
} }
*y = (int16_T)(q0 + *y); *y = q0 + *y;
} }
// =========================================================== // ===========================================================

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